# voltage drop across analog multiplexer

I am using a CD4051 analog multiplexer to interface with ADC. The system multiplexes from 8 identically setup inputs.

The voltage at an Ch X pin of multiplexer appears exactly as it is on COM pin until it is below about 1V.

However, as it increases above 1 V, the offset(voltage drop) starts to gradually increase with input voltage.

2V at Ch X pin leads to 1.98V at COM pin.

The supply voltage for both ADC and analog multiplexer is 3.3V

The Ron of analog multiplexer is 125 Ohms but there is virtually no current flowing through it, since the input impedance of the ADC is 6M Ohms.

I tried removing 1K resistor connecting COM pin and ADC input, but the drop voltage increased to 30mV from 20mV.

The result is that There is about 1 % nonlinearity. What is wrong and How should I improve it?

• Did you look at Figure 1 where $V_{DD}-V_{EE}=5V$ and the input current spec on page 8? Also, in your testing have you attempted to disconnect ALL of the other input channels from their CHx pins? I'm concerned about cross-channel leakage. And look at the THD figure of about 0.3% at 5V?
– jonk
Commented Sep 2, 2016 at 7:12
• What voltages do you use for the Analog and Digital supplies? On the Digital side, what is the voltage when high? If powered with 5V, a minimum of 3.5V is required for a high state. Commented Sep 2, 2016 at 7:58

Pay attention to Andy's comments on the dynamic input impedance of your ADC, which is almost surely an issue given your measurements but there is another important issue.

You state the Ron to be 125 ohms, but that's the typical value with a Vss-Vee= 15V. Your situation is completely different, and if you are actually using a CD4051, it will only barely operate properly from 3.3V and Ron is not guaranteed at all (it's only guaranteed to be less than 1050 ohms at 5V, and 1.2K at 85°C). Nor is even a typical figure given. You are well into here be dragons territory.

I suggest you add a buffer (op-amp voltage follower) after the multiplexer to isolate the dynamic loading of the ADC (typically it's a linear function of sampling rate) and substitute a 74HC4051 for the CD4051.

Your op-amp output is attenuated (20 k and 10 k) and this adds about 7 kohm to the effective resistance of the multiplexer. Given that the ADC input isstated as having an input impedance of 6 Mohms you immediately have a 0.1% error induced. OK that eats into any error budget significantly but doesn't account for 2%.

However, given that you will likely be using the multiplexer to run around the 8 inputs fairly quickly, the 100 nF capacitor will take quite a long time to recharge for each input. Effective source impedance (7 kohms) X capacitance gives the CR time of 0.7 ms but to get the cap charged properly takes around 10*CR so that's 7 ms.

Of course you may be making a static measurement and you may also be inferring the input voltage by using the digital value produced by the ADC. These things are unknown reading your question.

There is also another issue - the ADC may be specified statically as having a 6 Mohms input impedance but dynamically this value may drop significantly to a few kohms when measuring (scanning) and if you are doing static measurements (but repeatedly activating the ADC) this can induce another error. Bottom line is double check the spec for the ADC.

I tried removing 1K resistor connecting COM pin and ADC input, but the drop voltage increased to 30mV from 20mV

This hints to me that you are seeing a scanning error.