I am confused about the implementation of an open-collector circuit. From what I've read, there are many ways to incorrectly wire up an open-collector circuit. Before I explain my confusion, let me explain how I understand the term open-collector:

My Explanation Of An Open-collector:

  • The output of an IC is connected to a transistor. The base is connected internally to the circuit, the emitter is connected to ground and the collector is connected to the output pin (hence open-collector)

enter image description here

  • Therefore, the main purpose of the IC is to sink current externally and not to source current

My Confusion:

I've read from an article online that the proper way to implement the function of an open-collector is in the attachment of the image below:

enter image description here

This is basically a Quad, 2 input AND open-collector. It works and functions like a AND gate. 1A and 1B represents Input A and Input B respectively and 1Y represents the Output.

However, the textbook I am using takes a different approach as such:

enter image description here

This is a NAND gate. I am really confused about this implementation as it defies the truth table of a basic NAND gate. If both the inputs are high the output is HIGH, otherwise, the output remains LOW for all other inputs. This would be the traits of a typical AND gate.

I need some help clearing up my confusion as to why my textbook took that approach. Is my 74LS09 circuit configured the correct way?

  • \$\begingroup\$ Neither is "wrong" per se, they are simply used for different things. \$\endgroup\$ Sep 2, 2016 at 17:25
  • 2
    \$\begingroup\$ In Real Life, neither circuit will work as bipolar TTL inputs source current, and must be connected to ground to indicate a Low input. As shown, the inputs will appear as High whether the switches are open or closed. \$\endgroup\$ Sep 2, 2016 at 17:41
  • \$\begingroup\$ You'll have to elaborate on your claims about the truth table. \$\endgroup\$ Sep 2, 2016 at 18:56
  • \$\begingroup\$ @PeterBennett good point but I think the OP was wondering about the behavior of the output when the switches were connected as shown. Never mind the fact that you wouldn't be able to get it out of that state :-) \$\endgroup\$
    – Daniel V
    Sep 2, 2016 at 19:51
  • \$\begingroup\$ @PeterBennett with reference to your statement "... connected to ground to indicate a Low input." I've seen this being done in many examples, but couldn't quiet get my head around it. In the case of my first circuit (74LS09), how will the inputs appear as HIGH when both the input switches are open? There is no voltage nor current being applied to the inputs. \$\endgroup\$ Sep 2, 2016 at 21:42

3 Answers 3


If this were a true TTL schematic, none* of these two circuits would work. Both switch open and closed is seen as a logic "1". I'll explain later.

Don't confuse fig 2 LED=ON with output high. The low side output switch of open collector to LED is commonly referred to as "negative logic" or "Active low"

If you want AND with active high , use NAND with active low to drive a LED, since TTL pullup currents are not as high as active low collector to ground.

Now this is rather historical, but floating inputs are a bad practice on any logic. However in the lab, TTL floating inputs always float just above the input threshold at a logic "1" at a standard voltage level for all TTL of two diode drops or two Vbe drops or ~1.3V due to a small amount of internal pullup.

Thus switches are always to ground for TTL, but CMOS works either way with a pullup or down R for floating inputs.

It is possible but often impractical to use a pull down R for logic "0 in TTL. Thus we consider TTL as negative logic in for switch closure("0") and negative logic out("0") to drive an LED on the low side because all TTL open collectors are NPN and switch to ground.

enter image description here

Another detail on TTL open collectors.

Just because the SN7401N specifies an output of 16mA @0.4Vmax does not limit you to choose 20mA which may result in active low of 0.5V Max.

You could consider even higher LED currents if necessary up to 1V as long as you weren't using the active low out to feed another TTL input which expects Vin.low to be <0.8V

There are analog characteristics of Open Collectors and then there are logic levels if used next possible stage. IF not using NAND output for logic inputs, 1V low won't matter. except the transistor now dissipates maybe 1V*32mA =32mW. Except don't exceed the 20mA of a 5mA LED to keep from getting too hot.

Now getting back to figure 1 , if you read a circuit is to perform AND function in TTL with two input switches closed=1, due to biasing, in TTL you use negative logic and DeMorgen's Law to convert from AND to NOR then use input switches to ground each with 10k pullup and output to ground of the NOR gate with same LED and R output as fig 2.

  • \$\begingroup\$ Do they still teach these invalid TTL circuits? \$\endgroup\$ Sep 3, 2016 at 15:28
  • \$\begingroup\$ Unfortunately, yes :( \$\endgroup\$ Sep 3, 2016 at 21:53

In your first circuit, the gate output will have to sink 31 mA when Low, to turn the LED off, but the chip's maximum output current is only 8 mA, so this won't work, unless you increase the resistor value to get the Low output current below 8 mA. The 74LS09 is an AND gate: with both inputs High, the output will be High, and the LED will be on.

The second circuit shows the normal way to drive an LED. The 7401 is a NAND gate: with both inputs High, the output is Low, and the LED will be on.

  • \$\begingroup\$ I understand your first paragraph. I just used it as a demonstration as the LED required something like 8 mA+ to be turned on and I was working with the LED's maximum ratings. I guess my confusion roots from your second paragraph. In the case of the 7401, I was under the impression that a LOW output would switch off the output transistor and turn off the LED. This to me, would make more logical sense. \$\endgroup\$ Sep 2, 2016 at 21:55
  • \$\begingroup\$ The output transistor is part of the gate, not something added as an afterthought. The inversion in the open-collector output transistor is included in the gate logic. \$\endgroup\$ Sep 2, 2016 at 22:21
  • \$\begingroup\$ The point I was making was that with no prior knowledge of open-collectors, the output functionality of the circuit in diagram 2 would make more sense then diagram 3. I understand that the transistor is there on the output. I guess I created the wrong idea by using the words "I was under the impression...". \$\endgroup\$ Sep 3, 2016 at 12:01

Both approaches will turn on the LED.

EDIT: note, however, that you will not be able to toggle the output using either approach because opening the switches does nothing to change the polarity of the input to the gates.

You may be confusing the polarity of the output. For open collector output logic gates the logic function is realized including the polarity inversion from the open collector.

So in your second example the NAND gate really behaves like a NAND at the collector output and the output is pulled low thus turning on the LED.


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