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I am confused in definitions of VOH and VOL in VTC of inverters. My textbook says this graph:

textbook

but shouldnt the y value corresponding to VIL be VOH and y value corresponding to VIH be VOL OR Is VOH and VOL the largest and smallest voltage in the system respectively? I also saw this photo in my reference book which I think is correct:

reference book

But in my textbook they have written the whole book based on what I told earlier, for example when they are discussing resistive load inverter likeenter image description here

they drawed its VTC like this: enter image description here

the textbook is kang and leblebici and refrence book is weste and harris. So which definition is correct?? Because when I do analysis of circuits VOH coresponding to VIL will be different from VOH = maximum voltage in system and thus my Noise margin definitions might go wrong.

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  • \$\begingroup\$ What definition does your textbook give for VOH? \$\endgroup\$ Sep 4, 2016 at 4:59
  • \$\begingroup\$ I told you, My first pic explains what textbook says \$\endgroup\$
    – user98208
    Sep 4, 2016 at 5:14
  • \$\begingroup\$ But you say the textbook graph is the definition. If so then VOH cannot correspond to VIL. Are you arguing that the graph is wrong? How can it be wrong when it is their definition? \$\endgroup\$ Sep 4, 2016 at 5:20
  • \$\begingroup\$ Yes, I am arguing that it is wrong....just wanted to know if i am right \$\endgroup\$
    – user98208
    Sep 4, 2016 at 5:22
  • \$\begingroup\$ @ShubhamChawla No, the graph is right, the argument is wrong. \$\endgroup\$ Sep 4, 2016 at 7:21

2 Answers 2

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A valid confusion. But that's how books are written; not everything is or can be explicitly explained, you'll have to dig yourself a little more to understand.

Generally, in digital when we say logic '1', it doesn't really mean it is the value given at Vdd, but a small range of values can be accepted as a high or logic '1'; moreover, a lot of factors impede such a perfect Vdd for a high.

Now, usually textbooks consider VOH to be the value that can be considered as a 'high'. A few designs never produce a voltage equal to Vdd for a high, hence for such circuits how do you think the VTC should be? At the Vin = 0V, the output would be something less than Vdd, but still it would represent the logic '1'. In fact, now even if you increase Vin to a little higher value, the output would drop, as you can see from the VTC, but still it would represent a high; because like I mentioned; the logic '1' is a range of values; though very small.

Sung mo Kang and Yusuf Leblebici is a very comprehensive book and it posed a very general case of the scenario here; hence I would suggest you to go with it. All that said, the definition given in your reference book is not wrong! It's the case when the output would go to a perfect Vdd when the input is 0 Volt. Now, if you look at the VTC of Resistive-load inverter cicuit, the VOH value is taken to be Vdd; which means for that circuit, the output gives a perfect 'Vdd' for Vin= 0V.

Let me know if there's any confusion.

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It all depends on what definition of VOH is being used. Generally it is either the minimum voltage that is guaranteed to be a logic high, or the output voltage when the transistor is fully off (ie. Vdd or very close to it). Datasheets often specify a guaranteed minimum VOH. The actual VOH is expected to be higher, but is affected by supply voltage, input voltage, temperature etc.

So before you try to use some value, make sure you understand how it is defined by the supplier of the information. If your textbook defines VOH as Vdd then that is what it is in that text.

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