Looking at the current rating of the internal switches (3.6A) and the device pinout, the use of soldermask defined and non-soldermask defined pads seems to be correlated with one thing: the high-current paths. Control/status/feedback are all NSMD and referenced to the NSMD
GND pad. The input, output, and inductor pads are referenced to
PGND and are SMD. I conjecture that since pads 7 to 13 are on high-current paths, the footprint recommendation designer expected the pads to be connected to wide, heavy traces that could consume additional paste if NSMD pads were used. Thus, these pads are intended to have SMD openings to ensure consistent copper land sizes.
This conjecture seems reasonable given the example/suggested layout provided in the datasheet:
With the switched inductor being on connected using the other side of the circuit board, the enlarged copper area to hold the vias for
L2 would likely reduce the success rate for soldering those pads because the paste would spread over a larger copper area than desired. Thus, SMD openings for these pads contains the flowing solder and could reduce the defect rate for this component.