Ethernet: distance from PHY to magnetics

Question

I am confused as to the preferred placement of Ethernet PHY and magnetics. I thought that in general, the closer the better. But then SMSC/Microchip app note (http://ww1.microchip.com/downloads/en/AppNotes/en562744.pdf) says:

SMSC recommends a distance between the LAN950x and the magnetics of 1.0” at a minimum and 3.0” at a maximum.

Confusingly enough, earlier in the same paragraph one can read:

Ideally, the LAN device should then be placed as close as possible to the magnetics.

I used the excellent LANcheck service from Microchip and the expert reviewing my design also suggested that a minimum of 1" separation between the chip and magnetics is suggested to minimize EMI.

I do not understand why increasing the distance the signals have to travel would ever minimize EMI?

Also, a related question — I do not understand reasons for the following:

To maximize ESD performance, the designer should consider selecting a discrete transformer as opposed to an integrated magnetic/RJ45 module. This may simplify routing and allow greater separation in the Ethernet front end to enhance ESD/susceptibility performance.

Intuitively, magnetics that are embedded inside a shielded RJ45 module should be a better solution than discrete components with traces inbetween?

So, to summarize:

• should I try to maintain a minimum distance between the PHY and magnetics or should they be placed as close as possible?
• is it better to use a "magjack" or separate magnetics and RJ45 jack?

Answer 1

• First purpose of the magnetics on PHY is create a BALUN ( or interface BALanced line to UNbalanced IC and visa versa) This improves the Common Mode Rejection Ratio CMRR significantly over the full signal bandwidth.

• Secondary requirements are for impedance matching.

• Third requirements are by improving CMRR is to reduce radiated CM noise.

• Fourth is provide immunity to expected EM fields , ESD etc.

  1. When stray common mode magnetic fields are coupled to nearby unbalanced lines, it defeats the purpose. Due to inverse square law, couple after about twice the size of the magnetic core may be sufficient to achieve adequate CMRR but being unbalanced signal and ground impedances, making the path long exposes it to other sources of noise than be converted from CM to differential mode due to differences in coupling of different impedances.

  2. Magnetic core in 100MHz range and up tends to be conductive ceramic mix and also susceptible to conductive coupling of ESD as opposed to the more insulative LF high mu ferrite cores.

Answer 2

I do not understand why increasing the distance the signals have to travel would ever minimize EMI?

Those relatively short pairs don't radiate appreciably, so making them an inch or two long doesn't change much.

On the other hand, close proximity of the PHY and the magnetics couples those two, and lets the PHY's PLL and other digital junk couple to the big antenna a.k.a. the patch cable, that will re-radiate anything its extension has picked up inside the box.

To maximize ESD performance, the designer should consider selecting a discrete transformer as opposed to an integrated magnetic/RJ45 module.

Intuitively, magnetics that are embedded inside a shielded RJ45 module should be a better solution than discrete components with traces inbetween?

Physical proximity absent solid isolation barriers lets the external aggressor flash over to the victims on the "isolated" side of things. In terms of ESD, the advice is indeed right: having some separation between the jack and the magnetics minimizes the potential for leakage paths due to contamination and for flashover.

It can also improve the EMC a bit, by reducing the capacitive coupling from wideband internal sources to bandwidth-limited patch cable.