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When an ADC operates on an incoming analog signal, is the LSB assigned by rounding or randomly.

For example, assume that the LSB represents a difference of 1V. Does the ADC "look" at the continuously varying incoming signal and assign an output of 0 if the incoming voltage is < 0.5V or 1 if it is >= 0.5V or is the LSB assigned a 0 or 1 randomly by some quirk of the circuitry?

I am wondering if ADCs typically have front end analog circuitry to do rounding.

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  • \$\begingroup\$ Neither, it assigns 0 if <0.5V and it assigns 1 if between 0.5V and 1.5V, then zero above that and 1 above that progressively until all bits are set. \$\endgroup\$ – Andy aka Sep 10 '16 at 17:25
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Quantisation is a natural by-product of the sampling and conversion process; we normally have some external front end circuitry.

Virtually all ADCs will have a sample and hold at the front end; just how this is converted depends on the specific ADC architecture.

As ultimately a decision threshold circuit determines whether a particular bit converts as a 1 or 0, the precision of that threshold is what determines just where the quantiser gives a 1 or 0.

There is no 'rounding' circuit as such.

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There are two conditions an ADC can be operating in. Noise limited, or not noise limited.

If the ADC is not noise limited, then the ADC is essentially rounding to the nearest code. This doesn't really entail any extra circuitry though, it's a natural property of how the front-end works (which can vary a lot between different ADC architectures). Rather than thinking about it as rounding, it may be better to think of it as checking if the voltage is over the value required for one code, but not up to the value for the next code. Those codes are then assigned voltages half-way in between the two values being used for the comparison.

If an ADC is noise limited, then the noise is larger than the LSB. The LSB, and possibly some of the higher bits, are then determined by the noise in the circuit or in the input stage of the ADC. This means they are random. This is almost always the case with high bit depth ADCs, such as the various 24-bit designs on the market, which even in perfect conditions are unlikely to do better than 20 bits noise free. Those extra bits of noise are quite useful for averaging and filtering algorithms though.

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In general the bits of an ADC are determined by one or more comparators. They can either work in parallel or in a sequential manner.

The simplest case would be an ADC with 1-bit resolution, which is equal to a simple comparator. The LSB, or the only bit of the result, will be determined by a single comparison.

So this bit is deterministic and not just random.

However, assuming a switching threshold of zero volts, the input to this ADC could be zero and disregarding effects like offset or even meta-stability, the output of this 1-bit ADC indeed would be random because noise in the circuit would impact the precision of the circuit and the comparator would base its decision on the noise voltage at the input of the circuit. So the comparator would see a signal slightly above zero at one time at a signal slightly above zero at another.

The LSB is therefore not random per se, but it will show the biggest impact of non-idealities in the circuit.

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It is interesting that an 8 or 10 bits ADC is not really 8,10 bits or whatever. In fact, their effective resolution is something like 7.8, 9.5 bits. It is exactly because of the fact the LSB of some samples are chosen randomly. In other words it is supposed that all LSBs chosen based on comparison with the associated reference, however due to the circuit imperfections it is chose randomly (and hence wrongly) sometimes.

A one bit ADC like the one you mentioned, compares the analog value to a threshold voltage (you chose 0.5), if produces the corresponding digital value.

schematic

simulate this circuit – Schematic created using CircuitLab

Now, it is supposed that the comparator always works well and decides on the analog input sharply. However, due to the problems in the comparator itself (like kick back noise, thermal noise, meta stability,etc), it does not function as it is assumed. In regular ADCs with more than one bit, LSB is usually determined as the way you mentioned (comparaing to a threshold) but as one bit case, there are errors that sometime cause the LSB to be random.

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  • \$\begingroup\$ Thank you for all your thoughts. The various perspectives have provided me with material to investigate further. \$\endgroup\$ – user34299 Sep 17 '16 at 16:32

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