Analog Devices has published a note on high speed PCB layout, which shows examples of proper board layout for SOIC packaged op amps (figure 9, a & c). The note emphasizes that "keeping trace lengths short is paramount".
The first example routes the feedback path around the amplifier. The traces are very long, which should be avoided.
A second example routes the feedback path under the amplifier, placing the feedback resistor on the opposite side of the board. This reduces trace lengths, but requires vias. Vias "can introduce parasitic capacitance and inductance", so this should equally be avoided.
I was wondering whether it was not a better alternative to route the vias under the SOIC package (but still on the same layer) and place the feedback resistor above the op amp as shown below.
This way the trace lengths are kept reasonably short, without using vias.
But I guess if this was a better solution the author would have mentioned it. Is there a specific reason for not routing the feedback traces under the op amp package? Is this an acceptable, possibly even better layout for SOIC packaged op amps?