I’m planning on constructing a circuit like the one below as a way to reduce quiescent current draw from the components in series with the transistor T1 (n-channel MOSFET). There will be several components in series with T1 such as sensors, RF-transceivers and a MCU, but to keep things simple my focus for this question is the GPIO connection P1-P2 between the MCUs.
If both MCUs have power I can configure P2 as input and it would seem that the high impedance will prevent any damage from occurring. But what if the transistor T1 is turned off? Extrapolating from what I found during my internet research it would then seem to be unwise to set P1 as output low, since this would cause MCU2 to start pushing a substantial current through P2, possibly powering up MCU2 in the process.
Assuming the above is correct, there are still several other possible configurations for which I could find no clear answer. Thus, under the assumption that the transistor T1 is off, my questions are:
- What would happen if P1 is set as output high?
- What would happen if P1 is set as input low?
- What would happen if P1 is set as input high?
- Would it be beneficial to use an optocoupler or something similar between P1 and P2, to separate the MCUs and reduce possible leakage current?