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I have started to write serious test benches with lots of loops which have inner loops to check all the possible input conditions of a design.

Some of the test benches takes hour to finish. I am just wondering how people run these test benches faster? Do they use supercomputers?

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    \$\begingroup\$ No direct experience, so comment rather than answer. 'Hardware in the loop' is a general term. Many simulation vendors support connecting to FPGA boards, and moving some or all of the simulation to hardware. A JIT supercomputer basically! \$\endgroup\$
    – Neil_UK
    Commented Sep 19, 2016 at 6:43

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You may find another simulator like ghdl (open source) is faster than ISIM for many designs, even though there is less (no) development money available for optimising its performance.

If you structure your testbenches as independent tests, as favoured by Vunit (a VHDL unit testing framework), you can run multiple instances of ghdl (or commercial simulation tools like Modelsim if you can afford enough licenses) in parallel, by simply setting a command line option, up to the number of processors in your system.

(This assumes you're using vhdl, you didn't mention any HDL in your post. I don't know the state of simulation tools for verilog)

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  • \$\begingroup\$ I initially used ISim. Then I switched to ModelSim and it is way faster. \$\endgroup\$ Commented Sep 19, 2016 at 10:44
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    \$\begingroup\$ Ah I didn't notice it's you, I know you're using VHDL. For power user testbenching I'd take a good look at Vunit. \$\endgroup\$
    – user16324
    Commented Sep 19, 2016 at 10:50

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