Does anyone have any experience in using the Enhanced Parallel Master Port on the PIC24 family?
I am trying to use the example on page 42 of the EPMP manual - the "Read Example".
My problem is that the example doesn't even begin to even think about the vaguest possibility of working. The very first bit:
#define EXTERNAL_RESOURCE_SIZE 0x20000L #define CS_START_ADDRESS 0x200000L // define an array in EPMP EDS space to access the external resource __eds__ char pmp_data[EXTERNAL_RESOURCE_SIZE] __attribute__((space(eds), address(CS_START_ADDRESS), noload));
will not compile. It complains:
error: size of array ‘pmp_data’ is too large
Now, the EPMP on this chip has 23 address lines. That's a massive 8MB of address space - coupled with 2 CS lines, so a total possible of 16MB. This is only 256KB I am using (the example in the manual is for 2 x 128KB memory chips, which is as it happens just what I have here).
So what's the game here? I have had a poke around in the linker scripts, but nowhere in any of the chips' scripts can I see any mention of the EDS space. I am, quite frankly, lost in those gld files, and last time I tried tinkering with one it broke it completely.