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While designing PCBs, is running traces underneath SMT components considered a bad practice? And if so, what are the reasons?

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As a general rule, it is not a bad practice and is pretty standard. In fact, you would be making your life extremely difficult if you didn't allow any copper under SMT components.

What you need to be careful about is components that have conductive elements underneath. In these cases, the datasheet will specify a keep-out region, as shown below.

enter image description here

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    \$\begingroup\$ the other thing you want to avoid is running high-speed digital or analog traces under low-level analog components, particularly those not grounded. \$\endgroup\$ Commented Sep 24, 2016 at 12:38
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    \$\begingroup\$ Be careful of placing planes with large transient currents under SMT parts; many devices are highly susceptible (particularly mixed signal and small regulators) to local plane surges and this is rarely, if ever noted in datasheets. \$\endgroup\$ Commented Sep 24, 2016 at 14:11
  • \$\begingroup\$ Are traces under a keep-out still risky if soldermasked? \$\endgroup\$
    – nanofarad
    Commented Sep 24, 2016 at 17:32
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    \$\begingroup\$ @hexafraction My personal choice is to never rely on insulating properties of soldermask, though I know some people who would trust soldermask with their life... \$\endgroup\$
    – Armandas
    Commented Sep 24, 2016 at 17:39
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In layout rule, you can route traces under the components as long as it does not interfere the component.

Example running high speed or high current trace under your opamp which is the pre-amp for your audio. You will hear annoying noise coming out from your speakers.

Components that uses the board copper for heatsink like the powerpad from TI, can't route trace there.

Adc and Dac require ground fill under them, with their digital ground and analog ground short together.

110V or 230V that requires minimum distance away from other traces. The list goes on.

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