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For the circuit below, how do you do hand calculation to calculate DC operating point voltage Vo.

Actually, I can't find a way to do it now. Hope anyone can help.

Thank you.

enter image description here

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The answer is you can't.

You basically made 2 current sources, V11 and the PMOS the other one is V12 and the NMOS.

If those current sources would source exactly the same current, what would then the voltage be, assuming the current sources are ideal ?

Answer: it could be anything. Two current sources of the same value in series behaves the same as one current source. The node in between can be any voltage you like.

But these are not ideal sources so their currents will not be the same. Then the current difference has to go somewhere. Where does it go ?

Well, what will happen is that the MOSFET which wants to source the lowest current will "win" and force the other MOSFET into triode region. If the PMOS wants to source the lowest current it will force the NMOS into triode mode and the voltage V0 will be low.

So what value will the currents that these sources want to source have ?

Also that is difficult to determine as you will have to know all parameters of the MOSFET making it a complex calculation. This is where the simulator comes in. You could make plots for the currents of NMOS and PMOS over all possible values of V0 (0 to VDD) and see where these plots cross.

This is also an impractical circuit and only inexperienced IC designers put a 1 V voltage source between Gate and Source of a MOSFET. What I do is make a current mirror. Then a MOSFET-diode makes a voltage from a given current and that should result in the same current in the other MOSFET (provided it's Vds is large enough).

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  • \$\begingroup\$ Thank you very much for the thoughtful answer! I am reading the current source load differential amplfier as in the picture below and that is what made confused. postimg.org/image/y17kp99jh For the circuit, if I5 = 2*I3 then are the voltage at node V3 and V4 undefined? \$\endgroup\$ – anhnha Sep 24 '16 at 16:04
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    \$\begingroup\$ Indeed it is a similar situation as this is actually a current output amplifier. When unloaded the voltage gain is extremely high, it behaves as a comparator. Try this: fix V1 at VDD/2 and vary V2 between 0 and VDD. What do you think happens to the voltages V3 and V4. Draw the graph you expect on a piece of paper. Then simulate the same thing in Cadence ! \$\endgroup\$ – Bimpelrekkie Sep 24 '16 at 16:44

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