asychronous finite state machine , minimization and encode states

Question

Hey. I have Moore type asychronous fsm. I need to minize it, then encode states and get excitation functions for JK flip flops and output.

I have problem with encoding. As far as I know anti race coding says that only one bit can change. Two bits can't change simultaneously. I minimized it to 4 states and i can't encode states because each state has transitions that need change of two bits.

Here's what ive done

Thanks for answering!!

Answer 1

Write your FSM in correct Verilog, with proper 3 always@(...) implementation. Compile the code with all available optimizations. Get result. That's it.