# MKP DC-Link capacitor: Why Upp<0.2*Undc?

In the data-sheet of polypropylene DC-Link capacitor (Vishay MKP1848 or Epcos B32778), I can read: "The peak-to-peak ripple voltage (Upp) shall not be greater than 0.2xUndc". Undc is max DC voltage.

Up to now I have assume that AC voltage could be 350Vrms for a 500V MKP capacitor if we assume a very clear and very safe sine voltage. In the reality, it is not the case, and a margin is necessary, like 900VDC for household line use (other email list: with 240VAC in switzerland we have Upp=71%*Undc).

However the data-sheet of DC-Link MKP capacitor, they are more restrictive: the capacitor is design for DC voltage, and Upp (peak-2-peak) should be < 20%*Undc (VDC-max). So for 500V, we should not apply more than 35Vrms and always with the same voltage sign?

Polypropylene is non-polarized capacitor, so why such restriction for DC-Link? Is there a risk to not strictly follow the data-sheet? Where is the problem?

• Some non polarised capacitors are designed not to handle AC. It's generally a compramise of capacitance vs ESR vs physical volume when making it. In this instance, I suspect that the ESR is too high for the capacitor to support the current required to fully charge and discharge it continuously. The clue is in the name - DC link capacitor. – Matthew Sep 24 '16 at 20:34
• ESR? maybe no. Check this one: – ABU Sep 24 '16 at 21:04
• ch.farnell.com/fr-CH/vishay/mkp1848c71050jy5/… – ABU Sep 24 '16 at 21:04
• ESR is 0.003 ohm, max current is 19A! – ABU Sep 24 '16 at 21:06

DC-Link caps are designed to integrate the massive current pulses from voltage ripple and low Dissipation Factor, DF or it's equivalent ESR*Ipk^2*d.f. converted to RMS or using duty factor , d.f. of a pulse.

Historically capacitors have improved and presently, the figure of merit, that I use is

• T=ESR*C

• to "ballpark" choose an appropriate cap.
• 100us~3ms Alum. electrolyte, general purpose , small to very large

• 0.5~10us Alum. electrolyte, ultra low low ESR
• 50~150ns Plastic, self healing , high voltage , lower values with higher V

This range will improve over time with R&D and nanotube processed surface on foil conductors.

Thus when you know Ic=C*dV/dt , the Vpp ripple has a direct relation to power dissipation

• Pd=I²*ESR

This ripple current without chokes or external resistance becomes inversely related to the ripple voltage but duty cycle also reduces so RMS Pd is constant.

• But if ripple voltage is too large then rms power self heating will damage the product and fail well before rated hours at elevated temperatures. ( highly stressed Arrhenius Effects or highly accelerated stress screen or HASS)

When high rms ripple current is expected consider 20% margin below rated spec. of the component.

Bottom line is one uses large uF Alum caps for low frequency 100Hz and smaller value C plastic caps for SMPS off grid switcher at >=10kHz or step up using PFC when required for>100W in IEC std.

• I should say that the current could be a limitation for capacitance value above about 100uF. But if we take this one: – ABU Sep 24 '16 at 21:15
• ch.farnell.com/fr-CH/vishay/mkp1848-510-094k2/… – ABU Sep 24 '16 at 21:16
• The value is 1uF. If I make the calculation, 240VAC/50Hz should give 73mA. Maximum RMS current is 2A. So with 240VAC, we use 3.6% of the max current! – ABU Sep 24 '16 at 21:19
• what part of my explanation did you not understand? what f, Vpp Vdc ripple do you want? – Tony Stewart EE75 Sep 24 '16 at 21:20
• I continue my calculation: ESR is 0.063 ohm, so the dissipated power is 0.3mW. No risk of self-heating! – ABU Sep 24 '16 at 21:21