Problems with a two-diode 3.3V -> 5V level shifting circuit

Question

I'm trying to drive a strip of 57 APA102 LEDs from an ESP8266.

Driving just one LED directly (without level shifting) with a very short (about 10 cm) bus seemed to work, even though the APA102 expects 5V logic.

Now I built what I actually need:

• the ESP is about 1m away from the strip
• added diode level shifters for clock and data as per this answer: https://electronics.stackexchange.com/a/82112/18496
• the circuit is wired correctly, I checked all connections twice.
• ESP and strip are supplied by a 5V, 7A power supply, with 5V and GND connected on both sides of the strip.

The strip shows wrong colors, though. I think this is caused by the level shifting circuit, which simply can't drive the long signal lines with proper waveforms.

I lowered SPI frequency to about 500 kHz (bit-banged SPI with 1 microsecond delay between clock transitions), but the result remains the same.

It's hard for me to get many of ICs suggested for this kind of level shifting, such as the 74AHCT125 . However, I can get the 74HCT125. It can run off 5V and minimum high level input voltage is 2V. Would that be a suitable chip for this purpose?

Any other things I should try or test?

Voltage levels:

• The APA102 has a maximum low level input voltage of 0.3 VDD = 1.5V and a minimum high level input voltage of 0.7 VDD = 3.5V.
• The ESP outputs max 0.1 VIO = 0.33V or min 0.8 VIO = 2.64V. It seems to be able to drive 12mA.

Answer 1

The diode level shifter referenced is a shockingly bad design and useless in many cases.

For Vin = 0/3V3, Vout ~= 0V6 / 3V9
If that meets your needs you are lucky - there are few needs that it would meet.

Someone pointed out that LS Schottky will meet the need - any gate - not just ones intended as level shifters.
Without going and looking at the various family's level specs, it seems likely that most TTL families would meet the need of 3V3 in/ 5V out.
So eg 74HCT244 datasheet here gives you 8 level converters per package as does 74HCT541 - both about $US0.45/1 Digikey.

---

A far better circuit than the dual diode one is the one shown in the question that you referenced - see below.
The main drawbacks of this circuit are

• Iout = Iin - it does not provide any current gain.

• Being "single ended" it has a slow low-to-high transition as the high level is provided by pullup resistor R2. For typical values of capacitive load this is probably not a major problem.
  E.g. with a 1 nF load time constant = RC = 6k8 x 1 nF ~= 7 uS, i.e. operation at perhaps 20 uS minimum per high level to be safe - faster would often work. Lower values of R2 will allow faster operation as long as the input driver is able to pull down the load resistor.

The 2N7000 circuit shown on the same page does not have the Iout = Ion limitation. It does have the slow rise time issue due to the single-ended output, but as the input does not have to supply this current a lower value of load resistor may be used with no impact on the input.

There are various level-shifter circuits around - almost all are better than the diode-based one. If you are still uncertain then please supply a requirement with voltage swings and loads documented.

________________________________________________

Rehashings:

The various single MOSFET level translators in the various answers that chain back from links in this one seem likely to meet your need.
Also, a deleted answer referred to this 2N7000 level shifter pair which can be bidirectional but is obviously OK unidirectional in your application. The 2nd circuit on that page works with just a 0/3V3 in and no access to 3V3 supply which they derive from 5V. It appears again in this SE answer

This EDN article
Don't pay for level translators in systems using multiple power-supply voltages - May 25th 2006, contains links to a host of potential solutions. Including

Microchip 3V tips and tricks

Nokia 2 transistor bidirectional level translator wow! :-) - I'm sure it's simple enough but at first glance it's 'interesting'. Cross coupled bistable transistor latch.

TI level translator selection guide - !!!
86 bidirectional and 161 unidirectional solutions offered for 3V3 -> 5V.

1966 BJT based patent horrendously obfuscated.

Silicon labs IIC translator - uses the BJT cct above.

Std 2N7000 bidirectional or unidirectional translator With and without 3V3 rail available. 2N7000 data sheet - $US0.27/10 Digikey.

Answer 2

McMahon's circuit will work fine if you can find a BJT with very fast reverse transit times. (Low diffusion charge storage.) I like the idea of driving, by pulling through the emitter. But I worry a little that it will not work with the usual BJTs you might normally find. So if you want to try his circuit, make sure you pick a fast BJT. Perhaps try something like a 2N3391A, instead of a 2N2222A or 2N3904. Just be prepared to try different ones until you get a decent output at the frequency you want.

If the BJT has a poor reverse transit time, then you can find this out by observing the base voltage of McMahon's circuit with a 100X probe on the scope. Look for a voltage above \$3.3\:\textrm{V}\$. If you see the base higher, while driving the circuit fast, then you probably have to find a different BJT.

If you want to use pretty much any BJT, you'll need a different topology that is a lot more complex. I'm not recommending the following. (I think you'd be better off with McMahon's circuit and the right BJT.) But here's an illustration of what you might face if you want to use most any BJT:

^{simulate this circuit – Schematic created using CircuitLab}

Assuming \$200\:\Omega\$ driver impedances (and still more) it should keep up easily with \$1\:\textrm{MHz}\$. Drive currents will peak only for a very short moment, but generally will be at or below \$3\:\textrm{mA}\$. The circuit uses speed-ups (\$R_4\$, \$R_5\$, \$C_2\$, \$C_3\$, and \$C_1\$.)

Now if that doesn't convince you to use McMahon's approach, nothing will. But plan on selecting an appropriate BJT.

Answer 3

^{simulate this circuit – Schematic created using CircuitLab}

When it comes to driving cables where ringing can occur from the mismatched impedances and propagation delay, the proper way to improve signal integrity in non-critical logic is to lower the termination impedance towards the cable impedance and improve the voltage margin at the same time.

In this case you would like to improve the Voh(3.3V) to Vih(5V) voltage margin while there is good margin on Vol to Vil

Paired wires are around 200 Ohms and the driver is about est. 50 Ohms =(3.3-Voh)/Ioh.

Thus I would suggest a pullup R only around 330 ~470 Ohms to 5V. The only catch is if the 5V turns on before 3.3V powers up can cause a latchup situation. so the choice of R must limit internal ESD diode current to 5mA . you can add an diode for more pullup offset or Not! It depends on margin quality of signal and layout.

Output offset, impedance reduction for less ringing, logic level margin improvement on the transmission line with just 2 simple parts is one way to go.

A single R pullup is another solution.

The Emitter coupled logic driver solution is still best for rise time and voltage margin better with low impedance, low gain and fast slew rate. aka, Russ's CB amplifier

Falstad Sim https://goo.gl/ABVGjq For improved low side slew rate add small decoupling cap to BE junction.

You can even use a 74LSxx input as the TTL gives excellent logic margin from 0.8 to 2V vs the 0.3 to 0.7Vdd or 1.5V to 3.5V limits desired for the input (which is even better than Russ and jonk's solution with the widest voltage margin and 10ns slew rates and can tolerate a pullup resistor in case of slight ringing, but not necessary.