I intend to drive 6 LEDs with the PIC12F519 microcontroller if I am able to do so.

On page 61 of the datasheet the maximum current ratings are given:

Max current sourced per pin ....... 25 mA
Max current sunk per pin ........... 25 mA
Max current sourced on port ...... 75 mA
Max current sunk on port .......... 75 mA

Now, my question is: am I at or above the maximum ratings if half the port sources 75 mA while the other half sinks 75 mA? In other words if I source some and sink others do I have 150 mA to play with or do I have 75 mA?

Thank You

  • 3
    \$\begingroup\$ Probably a question for Microchip. \$\endgroup\$
    – user16324
    Commented Sep 26, 2016 at 23:49

2 Answers 2


The maximum ratings are usually about two things, broadly speaking. One is about local dissipation -- the port pins are often arranged near each other on the die and if you dissipate too much in a small area within the micro, then that area will become a hot spot and there is a limit beyond which you shall not go. Another is about the aluminum interconnects. They design these for a certain current limit. It's likely (though I wouldn't know, specifically, here) that there are some shared current paths for the port and that these also have limits. As I understand it, either of these may have been the actual limiting factor for the absolute maximum specifications you are reading (from which you actually should stay some distance!)

If it is the ability to dissipate power away from the local area, then I would probably assume that you cannot source \$75\:\textrm{mA}\$ and also sink another \$75\:\textrm{mA}\$ on the same port. It would be about dissipation and peak local temperatures, so it would probably mean you can't do both at once. (And you generally shouldn't do it, at all, of course.) If it is about current limits for the shared parts of interconnect, and if the sinking interconnects are in no way shared with the sourcing interconnects, then the answer might be "maybe." But I still wouldn't risk it. And it is almost never about the interconnects, from a few discussions I recall having years ago. It is usually about dissipation. I've only had one case where I actually had to contact the IC designer regarding the worst case design size of their interconnects flowing from one point towards another.

EDIT: I wanted to add a note about one way to examine the absolute maximum specifications to add a little information to how you think about these pin currents.

Each pin has a small impedance to ground, when low, or to the \$V_{CC}\$ rail, when high. The P materials generally have about \$\frac{1}{3}\$rd the mobility of N materials. Mobility directly relates to impedance. So it takes more cross section area to get the same impedance from a PMOS device than an NMOS device, broadly speaking. A manufacturer will sometimes do the extra work (squander more die space) in order to balance both the high-side and the low-side MOSFETs. But usually there is a difference.

It is sometimes instructive for you to actually test this out. The experiment isn't hard to do. Just make the output drive a load resistor (or a pair of them in a Thevenin equivalent) and measure the output voltage. You should be able to work out the current and voltage, knowing your circuit and the voltage measurement, and from this you can work out the driver impedances; both to ground and to \$V_{CC}\$.

My recollection of measuring the impedance of PIC parts was that they present about \$60\:\Omega\$ sinking and about \$100\:\Omega\$ sourcing. (In any case, I don't remember the value being identical.)

Now, let's think about the absolute maximum specs of \$25\:\textrm{mA}\$ per pin and \$75\:\textrm{mA}\$ for a port.

One question arises: What about a device with four ports!! Does that mean I can go drive each port with up to \$75\:\textrm{mA}\$? No. There will also be a device maximum supply current and you should not exceed that, either.

Also, if \$75\:\textrm{mA}\$ for a port, why not \$75\:\textrm{mA}\$ for a pin on the port if the other pins aren't loaded? Well, there may be limits per pin because the metalization to the pin can't handle more and if you drive it with more you will cause the metalization to start migrating over time and that would be a bad thing. Also, all that current in one very tiny place on the die might generate temperatures that are simply too high to be tolerated, continuously. (Implanted ions also can migrate and diffuse outward away from the hot spot, spreading out the designed features and eventually destroying the functionality.) So there are absolute maximums on each pin.

Finally, in the case I mentioned with the impedances I indicated for a PIC I once measured, the heating at \$\frac{75\:\textrm{mA}}{8}=9.4\:\textrm{mA}\$ would then be about \$6−10\:\textrm{mW}\$ per pin (depending on high or low output value), if divided evenly. Say, \$50−80\:\textrm{mW}\$ total for the port. But that becomes almost \$200\:\textrm{mW}\$, if all of it were sourced out of just three pins (staying within the absolute maximums for each pin and for the port.)

I might feel that pushing \$50\:\textrm{mW}\$ for the port would be tolerable (if it bought me something in other trade-offs and didn't risk something important.) But I would definitely not feel comfortable at \$100\:\textrm{mW}\$ per port. And so, broadly speaking, I'd keep the designed pin output currents at around \$6-8\:\textrm{mA}\$ and no more than that. Even though the absolute maximum specifications suggest you can do more.

  • \$\begingroup\$ Thanks @jonk. I was afraid heat would be limiting me to 75 mA. I think I will heed your advice and reconsider. I want them to be bright enough for a fiber optics display and from what I can gather if I can't give them each around 20 mA direct then I should buffer a few. \$\endgroup\$
    – Jwizlo
    Commented Sep 27, 2016 at 0:12
  • 3
    \$\begingroup\$ @Jwizlo As both your answers (so far) tell you, you shouldn't consider "Absolute Maximum" to be "Operational Guidelines." So if you see \$75\:\textrm{mA}\$ listed, that doesn't mean "go do it." So you need to plan a fair amount less. \$\endgroup\$
    – jonk
    Commented Sep 27, 2016 at 0:15
  • \$\begingroup\$ Yes, I will not try to push the port to its limit. I was only confused as to whether source and sink ratings were totally separate. 150 mA max would imply a much higher safe current rating then 75 mA max, of course. \$\endgroup\$
    – Jwizlo
    Commented Sep 27, 2016 at 0:26
  • \$\begingroup\$ @Jwizlo Got it. My recollection of measuring the impedance of PIC parts was that they present about \$60\:\Omega\$ sinking and about \$100\:\Omega\$ sourcing. (I don't remember the value being identical.) The heating would then be about \$6-10\:\textrm{mW}\$ per pin, if divided evenly. Say, \$50-80\:\textrm{mW}\$, total for the port. But almost \$200\:\textrm{mW}\$ if all of it were sourced out of just three pins. So you also need to do logic checks like that, as well, when considering getting anywhere NEAR the Absolute Max values. \$\endgroup\$
    – jonk
    Commented Sep 27, 2016 at 0:35
  • \$\begingroup\$ Wouldn't interconnect size also be about dissipation? \$\endgroup\$ Commented Sep 27, 2016 at 9:38

The table you reference gives Absolute Maximum Ratings. The footnote to that table states:

†NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability

Look a little further down the datasheet to page 65, where more typical operating characteristics are given. There you will see that the Output Low voltage will be up to 0.6 volts at 8.5 mA, and the Output High voltage will be Vss-0.7V at 3 mA.

I would stay well away from the Absolute Maximum Ratings.

  • \$\begingroup\$ Yes, I understand I must stay well below maximums for a reliable design. Still if they were separate ratings, a safe level would surely be much higher as I could for example push 30 mA and pull 30 mA and still be under half of those individual ratings. \$\endgroup\$
    – Jwizlo
    Commented Sep 27, 2016 at 0:34

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