Maybe you could breadboard this out of some basic gates. One possibility: an oscillator giving the 200 Hz (5 ms) basic pace. Divide by four using a cascade of two J-K flip-flops (= a two-bit binary counter). Use an AND or NOR gate to detect a 00 or 11 binary on the output of the counter, and use that detection result to gate the 5ms signal (you may end up with short residual glitches, not sure. Would require a tiny further post-processing step). This should result in 3 pulses (edges) spaced 5 ms and a fourth pulse missing. Next, use that to trigger a single-shot with an RC cell for your variable timing constant, and use a potentiometer to tweak the pulse width.
[200 Hz clock] -> [1:4 divider with 00 detection] -> [00 gate] -> [single-shot]
Bi-phase means what? Two outputs like that? What shift between them? A tandem potentiometer might be used to tweak the pulse width in both channels.
And oh you'd need a discrete transistor circuit to level-shift this to 19 V.
An op-amp could do it for slower signals, but sub-microsecond rail-to-rail pulses are probably too much to ask from a typical op-amp that can stand 19+V Vcc.