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enter image description hereI am having trouble with a Digtal Works Simulation of a Ring Counter. (Version 3.0.5.0, copyright Mecanique)

The on-off button does not clear the flip-flops; the flip-flop to the left is always on.

(I am using this in a simulation of a CPU for the computer organization class I teach. This will be for the basic control, whether the computer is fetching an instruction, from memory, doing an immediate operation, etc.)

I searched for "Digital Works" in this Stack Overflow and found nothing. Of course, I did find and use plenty of information on the web in general on this issue.

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  • \$\begingroup\$ I'm not familiar with the software, but something looks weird about the wire below the middle right flip-flop. It's got a junction dot in the middle of the wire, and it goes past the pin. Is it connected properly? \$\endgroup\$
    – user39382
    Sep 29, 2016 at 21:06

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I have included an annotated image of your schematic:

First, it is a bit of a mess. It goes a long way to make the schematic "look clean", especially because wire jogs often cause netlisting errors (or at least does not netlist how you would expect). Each wire is ideally straight. The gates are not randomly placed but rather laid out in a fashion that intuitively shows the signal flow.

annotated schem

I am unfamiliar with what these bottom two ports on the flip flop are. I am assuming it is some sort of clear?

Regardless, notice the green net. What is driving this? It looks floating to me. Generally you want to tie nets to either the supply voltage or ground. If they are just floating the behaviour can be unpredictable.

Alternatively, the red net (which connected to the left most flip flop) goes to the same port on each flip flop as the green yet does (clear I assume). But, it is tied to the pushbutton, whereas the green yet is not driven by anything.

So if you want the left most flip flop to act like the other 3 flip flops, connect it with the dotted orange line and cut the wire to the first flip flop coming from the red net (purple dotted line represents cut).

However in practice you would want to make sure all of the input nets are tied. My guess is that you can get away with it in this case because you are simulating based on verilog, and the reset is something like @rising_edge(clear). Since a floating net doesn't ever 'rise' this never triggers. But in real life it would cause very unpredictable results since its voltage could fluctuate based on noise and drift.

Here is an example schematic of how I would build it:

myschem

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  • \$\begingroup\$ Thank you for the quick answer. I implemented your diagram in the Digital Works designer. (Note this tool is not verilog based; it seems to be an old- fashioned digital logic schematic drawer/simulator, which seems appropriate for this course). The problem is that when I start the system in normal run and press the button, I end up with more than one bit in the ring counter. When I step one-by-one, it is difficult just have the button depressed for one cycle. However, I finally got it to work, but I prefer it were less tricky, both for myself and my students \$\endgroup\$ Sep 30, 2016 at 14:15
  • \$\begingroup\$ @LaurenceLeff: You may instead initialize the counter with a 4-input NOR gate rather than the pushbutton. Each input is the output of one of the flip flops. That way only when all flip flop outputs are '0' will the NOR gate produce a logical '1' value to start the counter. Then you may not need the pushbutton at all. \$\endgroup\$
    – jbord39
    Sep 30, 2016 at 14:34

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