I am working on my first Systems project as a student and I am learning how to integrate chips as I go along in Altium.
I recently came across this question in which you provided a rule for determining the solder mask expansion sizes for BGA Chips: What is the pad size required for this BGA AW H3 Chip?
I am wondering if there is a similar set of rules for QFN chips? We have a PMIC that we are integrating on Altium and we just want to make sure that our solder mask expansion sizes are sufficient. Currently we have the small pads having dimensions of 0.25x0.50mm and a solder mask expansion of 0.05mm.
Here's the link to the QFN Chip:
Also, we are drawing the footprints for the passives that we are going to use (0402,0603, 1005, etc.). Will it be okay to have the same footprint (with relaxed dimensions) for Capacitors, Resistors, and Inductors? What is an appropriate way to design the footprint for the passives?