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I am using a DE0-Nano board in my project. It has an Altera Cyclone IV E FPGA chip in it plus other components such as ADC, RAM, etc. When connected to a USB power supply, the DE0-Nano requires around 5V to operate. However, from my research, the Core FPGA only uses 1.2V as its core voltage. When the board draws power, is it possible to identify which is due to the Cyclone IV E FPGA and which is due to the other components? I attached some links to schematics and references. I cannot figure it out on my own. Thanks in advance.

http://www.terasic.com.tw/cgi-bin/page/archive_download.pl?Language=English&No=593&FID=75023fa36c9bf8639384f942e65a46f3

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    \$\begingroup\$ altera.com/support/support-resources/operation-and-testing/… , it seems to be too complicated. I was dealing with it some time ago, did not like it, but there seems no other way to identify what you need. \$\endgroup\$ – Anonymous Oct 4 '16 at 14:11
  • \$\begingroup\$ If you really want to measure it on the demo board, your title is misleading. Something like "Measuring FPGA consumption on the DE0-Nano" would be clearer. If you just want to estimate power consumption of your design, there you go. \$\endgroup\$ – dim Nov 3 '16 at 20:12
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If you are the one who designs hardware implementation - you will know it's power consumption when you use vendors development tools. Xilinx software automatically provides expected power consumption reports. I would expect Altera to provide similar reports as well.

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If you do not work with hardware development directly, then it would be difficult to determine only the core power consumption, if it is not specified. You would need a board schematic to know which points to tap in that supply only the FPGAs core. This would likely involve breaking physically the circuits/traces to measure the current, given that they are exposed (not within the board layers).

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  • \$\begingroup\$ I work with Altera CPLDs/FPGAs for several years, and did not see such nice informational reports... \$\endgroup\$ – Anonymous Oct 4 '16 at 14:13
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    \$\begingroup\$ @Anonymous This is the Xilinx Vivado report for a Zynq SoC \$\endgroup\$ – Nazar Oct 4 '16 at 14:14
  • \$\begingroup\$ This is actually the point. For Altera I did not see such stuff. \$\endgroup\$ – Anonymous Oct 4 '16 at 17:03
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Altera has a rather large spreadsheet-based tool called the "Early Power Estimator" that you can use to get some estimates early in the design process.

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