Sounds like a very educational project.
Typically, DRAM manufacturers specify that each row must have its storage cell capacitors refreshed every 64 ms or less.
My understanding is that you can use any one of the following 4 ways to keep the DRAM refreshed:
(a) My understanding is that all SDRAM has an internal on-chip timer that automatically refreshes the SDRAM when the SDRAM is placed in self-refresh mode and the clock to the SRDRAM is stopped.
My understanding is that most simple systems don't bother with self-refresh mode, and instead use one of the other methods of refreshing DRAM:
(b) Some systems have special refresh hardware that periodically pauses the CPU, performs a refresh, then resumes the CPU.
(c) A few systems have a special "refresh interrupt" -- a timer signal periodically triggers a hardware interrupt, and the software in the interrupt handler does a refresh, and returns.
(Some systems interrupt once every 64 ms,
and the interrupt handler reads N bytes -- one byte from every DRAM row -- refreshing all the DRAM in one whack, then returns.
Other systems interrupt once every 64/N ms,
increment a row counter and read one byte from that DRAM row, then return).
The "refresh interrupt" approach requires the least amount of hardware.
Alas, a "refresh interrupt" has the drawback that minor bugs in the refresh interrupt software, or bugs in any other software that delays the refresh interrupt too long, cause weird difficult-to-reproduce problems elsewhere when memory becomes corrupted.
(d) Many early computer systems had special DMA video hardware that pauses the CPU, reads video data from the DRAM, and sends it to the video hardware.
Many of them are set up such that the process of reading out all the video data, as a side effect, also reads at least 1 byte from every row of DRAM, indirectly refreshing all DRAM.
p.s.:
Are you actually using a (effectively) 32-bit 68000, like the original Macintosh and Palm Pilot?
If so, you may find it useful to check out the Minimig project, which uses a 68000 (and lots of SRAM), and the FPGA "soft cores" that execute the 68000 instruction set.
Or are you actually using an 8-bit Motorola 6800?
If so, I highly recommend you check out the N8VEM Home Brew Computer Project.