I am trying to design a half bridge isolated DC DC converter but I am encountering some issues.
Is there an effective way to come up with a minimum value of capacitors C1 and C2. In all the papers that I read, they just seem to come up with a value as big as possible. The tricky thing is that I will not use any electrolytic capacitors, only film and ceramic ones in my design. This means that I cannot really use a very high value, but I am however using a very high switching frequency (100-500kHz probably). So I hope that this might reduce the need for a very large capacitor.
It seems from Link 1 that there might be a problem regarding converter stability when a current mode controller is used. I am wondering if this converter could cause a problem when voltage mode control is used and the converters are placed in parallel... As I have always read that you need current mode control in order to put SMPS in parallel. Does anybody have any experience in this area regarding the stability of half bridge converters and paralleling them?
I have added a quick drawing for completeness.