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I'm trying to determine the life of some EEPROM. I will be erasing a byte (setting to 0x00, clearing a parity bit) as frequently as I will be writing to it. So if setting it to 0x00 counts as a wear cycle, I will effectively be having the number of cycles I can use that address.

Does writing a 0 count as a wear cycle or not?

EDIT: it is the act of flipping a bit back and forth that I am trying to estimate wear on, not writing a 0, since EEPROM is 0xFF when erased. So, if I start with erased memory (0xff) set an address to 0x00, then back to 0xff, then back to 0x00, does this count as two wear cycles or three?

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See also 100k EEPROM writes "per bit" or as a whole?

The polarity is the other way up for most chips: "erase" sets a byte or group of bytes to all 1s. So you need to be a little careful. Because writing the byte to 0x00 incurs an erase and a write, and then setting it to e.g. 0x01 incurs another erase (to 0xFF) then a write.

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  • \$\begingroup\$ ... which suggests that wear could be reduced (to half?) by checking the status before writing. If it's correct then leave it. \$\endgroup\$
    – Transistor
    Oct 6, 2016 at 14:23
  • \$\begingroup\$ @Transistor: unlikely to gain you anything for those where you erase in blocks \$\endgroup\$
    – PlasmaHH
    Oct 6, 2016 at 14:25
  • \$\begingroup\$ Thanks for the quick replies. To clarify: sorry, I haven't looked into the logic enough to know if this chip is default 1 or 0. My point is, does resetting the memory to its default value cause a wear cycle, or is it just switching it from the default to the non-default? In other words, if I set a bit, clear the bit, then set that bit (not getting hung up on whether setting/clearing is 0 or 1), does that count as 2 wear cycles or just 1? I can always invert my logic, it's how to count wear cycles that I'm hung up on. \$\endgroup\$
    – Bob
    Oct 6, 2016 at 14:41
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    \$\begingroup\$ I believe that wear is specified in terms of erase cycles. So 0xFF -> 0x00 is a write (not a wear cycle), then 0x00 -> 0xFF does count as a wear cycle. Note that you can clear bits one by one without incurring wear cycles, e.g. 0xFF -> 0x7F -> 0x3F ... -> 0x01 -> 0x00 does not count as a wear cycle. \$\endgroup\$
    – pjc50
    Oct 6, 2016 at 15:10
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    \$\begingroup\$ @pjc50 I think you should include that technique in your answer \$\endgroup\$ Oct 6, 2016 at 16:53

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