Can I build a 3 bit modulo 7 counter using 2 flip flops ?, I'm thinking of using the clock as the third bit since it toggles from 1 to 0. Will that work ?

edit: Found this circuit which uses two jk flip flops but counts down enter image description here

Link, Circuit

Would it be possible to make it count up as well ?

  • \$\begingroup\$ Edit your question to include what you've worked out so far. Use the {} code button or four spaces at the start of each line to create fixed width font. Create a table with headings 4 - 2 - 1 - Q1 - Q2 for your scheme. \$\endgroup\$
    – Transistor
    Commented Oct 9, 2016 at 14:48
  • \$\begingroup\$ each FF is a memory cell that can store 2 binary states max. A clock with 2 binary states has no memory hence cannot be used as a counter \$\endgroup\$ Commented Oct 9, 2016 at 15:30
  • \$\begingroup\$ I like that diode to bring the duty cycle close to 1:1. The lower the Vf of the diode compared to the supply voltage the closer it will bring the duty cycle to even. \$\endgroup\$
    – KalleMP
    Commented Oct 9, 2016 at 19:40
  • \$\begingroup\$ Use negative edge flip flops, e.g. 74x112. But I wouldn't call this a 3-bit counter. This is still a two bit counter, even though you can include the clock to give you 3-bit combinations. \$\endgroup\$
    – rioraxe
    Commented Oct 9, 2016 at 23:36

2 Answers 2


Technically, that's a 2-bit counter which uses the clock state as a pseudo-bit. If the only problem you have with it is that it appears to count down and you want it to count up, you can simply change the LED connections, as so


simulate this circuit – Schematic created using CircuitLab

In the original, a high voltage produces a voltage across the LED/resistor and turns the LED on. In the new configuration a high produces no voltage and the LED is off, while a low voltage turns it on.

The requires that the logic you're using be able to sink currrent (suck it it) rather than source current (push it out), and you should be aware that if you're using the old 7400/74LS00 series ICs, they are not at all good about sourcing current, and the second approach is the preferred one if you want to get any brightness out of the LEDs.

With the LEDs changed you'll see that, in the original sequence, all 1's become 0's, and vice versa. Map out the new sequence and you'll see that it now counts up.

  • \$\begingroup\$ Yes, this is good, the edge sensitivity cannot be changed and the count needs to occur on the more significant bit when the bit state is changing to 'zero' to count up. \$\endgroup\$
    – KalleMP
    Commented Oct 9, 2016 at 19:44

One FF holds one bit of information, which can distinguish 2 states. N FFs can distinguish 2N states. Whether or not you can consider the "state" of the clock to be one of your state bits is only something you can answer, but it would be unusual, to say the least.

However, consider the order of the states you need to sequence through in an up-down counter. In binary:

000 ↔ 001 ↔ 010 ↔ 011 ↔ 100 ↔ 101 ↔ 110 ↔ 111 ↔ 000

Note that when counting up, the middle bit changes on the high-to-low transition of the LSB, while when counting down, it changes on the low-to-high transition. Making this work correctly with only two FFs will be a challenge, to say the least.

Keep in mind that changing the state of the up/down control signal cannot immediately change the output of the circuit! I don't think there's any way to do that without creating another internal state variable — effectively a third FF.


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