0
\$\begingroup\$

Create a circuit-table which compares two (signless) 4-bit binary numbers. The result is output signal c_i which is 1 if we have A≥B.

Given is A=0100 and B=0010. Fill the table whereby you choose c_-1 bit yourself so it makes all sense..

I believe this compare is done by subtraction and so we can use adder for this

(this is now for 1 bit:)

        3   2   1   0
----------------------
Ai      0   1   0   0     
Bi      0   0   1   0
~Bi     1   1   0   1

Ci-1    1   0   0   1

Ci      1   1   0   1 

We need to negate B, so negation of B is ~Bi in the table.

Then we add A and negation of B and if we see that Ci is 1 then we need to make sure that we get a carry when we add A and not B. I thought this is done like that.

Please can you tell me if this is right?

\$\endgroup\$
  • \$\begingroup\$ Too much work. Figure it out for 1- and 2-bit inputs and extend it. \$\endgroup\$ – Ignacio Vazquez-Abrams Oct 10 '16 at 11:33
  • \$\begingroup\$ This is all it's not too much. Only need to know if I udnerstood right? In table Ai and Bi and Ci are filled correctly anyway, only need to know if I filled Ci-1 correct too. \$\endgroup\$ – tenepolis Oct 10 '16 at 11:34
1
\$\begingroup\$

The simple answer is: compare is set-carry, subtract with carry. The only difference is the result is not stored.

So: Start with carry set, two-complement the compare value, add it to the accumulator value. You are done.

\$\endgroup\$
  • \$\begingroup\$ Thank you! Can you please explain with a bit more detail? By set-carry you mean ci-1? Is the way I filled table correct? Please tell me if you can I need to know this for my exam :) \$\endgroup\$ – tenepolis Oct 10 '16 at 13:07
  • \$\begingroup\$ @tenepolis: I thought so [^.^]; Please forget your Ci and Ci+1. The carry flag is a single bit in the status register of an ALU. So you start with this flag set. Then the ALU does the operation with all the "internal carries" immediately applied as put by the full-adder logic table. The set carry flag is put into the carry input of bit 0 full adder on start of operation and taken from carry output of MSB full adder on end of operation. \$\endgroup\$ – Janka Oct 10 '16 at 13:16
0
\$\begingroup\$

I think you need Ci-1 to do so: 1 0 1 1 but I'm not sure. Correct me if I'm wrong I'd also be interested in knowing it.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.