Can anyone tell me how to get the number of the LUTs-ff pairs and logic cell used under most efficient and inefficient condition in my ISE Design Summary.

I can see there are data of 'Number of Slice LUTs' and 'Number of Flip-flops', so I'm just thinking if the sum of these 2 data is the amount for most inefficient condition.

  • \$\begingroup\$ what does this have to do with cortex-m0? \$\endgroup\$ – Marcus Müller Oct 12 '16 at 13:07
  • \$\begingroup\$ I simulated cortex m0 in my experiment. \$\endgroup\$ – Yicheng Yang Oct 12 '16 at 13:14
  • \$\begingroup\$ What do you mean by "most inefficient condition"? \$\endgroup\$ – duskwuff -inactive- Oct 12 '16 at 16:16

I believe that the "most efficient" and "most inefficient" conditions of LUT-FF pair utilisation refers to how well your design in packed in the logic cells.

Assuming each logic cell has 1 LUT and 1 FlipFlop, the "most efficient" scenario is when you use every logic cell's LUT-FF pair, such that if you have used "L" LUTs and "F" FFs, you used only "C" cells, where

C = L = F

i.e. no resource in any of the cells is wasted.

In the same situation, the "most inefficient" scenario is when you haven't been able to use a single LUT-FF pair, such that using "L" LUTs and "F" flipflops made you use "C" logic cells, where

C = L + F

.i.e. every cell's resource is wasted.

This is of course simplistic as there are other factors including route-through elements & control set restrictions, which are beyond the scope of this answer.

I believe the map report, design_name.mrp will have this detail under the section Slice Logic Distribution.

  • \$\begingroup\$ Thanks, that is correct, my teacher taught me the same thing. \$\endgroup\$ – Yicheng Yang Nov 22 '16 at 18:59

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.