Ball grid arrays are advantageous integrated circuit packages when a high interconnect density and/or low parasitic inductance is paramount. However, they all use a rectangular grid.
A triangular tiling would allow π⁄√12 or 90.69% of the footprint to be reserved for the solder balls and the surrounding clearance, while the ubiquitous square tiling only allows π/4 or 78.54% of the footprint to be used.
Triangular tiling would theoretically allow either reducing the chip footprint by 13.4% or increasing the ball size and/or clearance while maintaining the same footprint.
The choice seems obvious, yet I have never seen such a package. What are the reasons for this? Would signal routing become too difficult, would manufacturability of the board somehow suffer, would this make adhesive underfill impractical or is the concept patented by someone?