Logic Gate - What will be the input?

i = 0 & s = 1

An input of 3rd NAND is 1, 4th NAND input is 0... What will be the second input of 3rd and 4th NAND gate? Why?

This circuit is known as a gated D-latch. When s=0, a and b are 1, regardless of the value of i, so the output o remains constant. In particular, if o=1, then c=0, and if $o=0$, then c=1.