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I would like to know how transceivers (which are used to send and receive differential signals) are implemented. AFAIK the receiver the transmitter (TX) could be something similar to an H bridge. I already took a look at datasheets of some popular transceivers but I could not find any details about the inner working.

EDIT : the term transceiver might be a little to large, by transceiver I mean the ones used for RS 485 (eg : for USB or DMX-512)

enter image description here

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    \$\begingroup\$ Can you be a bit more specific? I'm not really into transceivers, but I guess you get anything from DC to some GHz, anything from LVDS to RS485 levels so well... Implementations would be quite different. \$\endgroup\$ Commented Oct 16, 2016 at 11:33
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    \$\begingroup\$ However, each leg of the transmitter is typically a push-pull output stage ... aka a half-bridge ... so the premise in the question is reasonable. Exceptions would be multi-drop links which may use open-collector (open-drain) outputs to permit safely sharing. \$\endgroup\$
    – user16324
    Commented Oct 16, 2016 at 11:39
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    \$\begingroup\$ For most users it is important that they work as specified and not what is inside, so it might be a manufacturing know-how and they just won't publish it for the competitors. \$\endgroup\$ Commented Oct 16, 2016 at 11:52
  • \$\begingroup\$ You could check the inner workings of comparators (eg. LM311). The typical impelementation is some variation of the long-tailed pair. \$\endgroup\$ Commented Oct 16, 2016 at 13:35

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Assuming the receiver side of a transceiver is boring to you (just a comparator with some hysteresis):

TI's DS9638 (datasheet of the SNLS389D) actually has an equivalent circuit for a single transmitter circuit:

equiv. circuit

To illustrate what's happening a bit better: colorerd

In green, the identical output stages. Look at the left:

  • Q15 has the job of pulling the output low as soon as the base of Q6 sees super-threshold voltage
  • Q18+Q19+Q17 form a current amplifier
  • rest of the combination of Q16's collector and Q18 base invert

The whole functionality of the center part is to make sure Q5 and Q6 see the inverse, but at very tightly controlled thresholds.

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  • \$\begingroup\$ Thanks. I was actually expecting something a LOT simpler. This actually is as much complex as an op amp. \$\endgroup\$
    – tigrou
    Commented Oct 16, 2016 at 17:17
  • \$\begingroup\$ well, it's some kind of hysteresis element with an inverting and noninverting amplifier. So yes, that's still pretty simple. I think you might be underestimating the complexity of modern Opamps, by the way – this isn't the 60s anymore :) \$\endgroup\$ Commented Oct 16, 2016 at 17:20
  • \$\begingroup\$ also note that this circuit has a low-to-high transition time of <20ns – so it makes sense to make very sure that the output stages (everything left of Q16/everything right of Q8) is very cleanly and synchronosly driven, which complicates the design of the center disrtribution/inverter part; if you think about it: six transistors per output is actually pretty simple \$\endgroup\$ Commented Oct 16, 2016 at 17:24
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It looks like an Op Amp differential outputs, but it's more like buffered Schottky TTL logic with even higher current drive capability. The main difference is that TTL is asymmetric impedance for more current active low, which this driver is even higher current than TTL and CMOs buffers but more symmetrical low Z. The output impedance is ~ 8 Ohms rather >= 300 Ohms on Op Amps (without negative feedback which lowers Op Amps but they are still more current limited than RS485) and also much slower slew rates.

Note the output on the high signal has a series R of 8 Ohms driven by a very low Z Darlington on both outside circuits and the low side collector output has an equivalent Rce giving about the same low source impedance due to higher controlled base current.

The single ended logic Input is more like low power Schottky logic with the same thresholds as all TTL families and HCT CMOS logic, namely 0.8V & 2.0 V worst case with a midpoint threshold of 1.3V like a comparator with a 1.3V reference that may shift with temperature extremes.

  • the theory and practice that makes RS-422/485 transceivers work better is balanced transmission lines with complementary drive making common-mode noise more rejected and the 100 Ohm differential load makes reflections that cause ringing, less likely to occur.

Looking at the VI characteristics we see;

  • Vih=2V min and Vil=0.8V max , just like all TTL since day "1" and same for RS-232 inputs, except we use big bipolar drive signals for long cables to make noise look relatively small.
  • The output swing is from 0 to 3V making the differential receiver without Tx series R's sometimes added to reduce source ringing to see +/-6V with no loss and +/- 3V differential with series R dividers to match the 100R differential load. enter image description here

TI also makes a 3.3V logic chip for RS-422/485 work using special CMOS with very low RdsOn unlike 50R in 5V logic and 25R in advanced low voltage logic. Except they add 5R in series to match the performance of the bipolar chip discussed here.

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