# Why is synchronous logic design not relevant for combinational logics?

I have started learning about sequential logic after finishing combinational logic. I learnt that clocking/synchronizing is very important in sequential logic design. Why is that so? Why could I build MUXes, adders, ALUs without worrying about clocks/synchronizing?

• You need to expand on how you think combinatorial logic is used so we undersatnd what you know - but really finish reading this chapter first, I think. – Sean Houlihane Oct 17 '16 at 8:06
• My understanding is that combinational logics are ones that doesn't depends on previous values (history). – krismath Oct 17 '16 at 8:28
• Combinational logic is stateless: the output depends only on the input. Sequential logic includes state elements. Clocking updates the state. – pjc50 Oct 17 '16 at 8:40
• @krismath, these two parts can't exist in isolation. Most circuits which involve combinatorial logic apply different values to the logic, and use the result. Timing is always important, it is the synchronous logic which exposes the need to consider timing. Draw out a real circuit, not just a fragment. – Sean Houlihane Oct 17 '16 at 8:59
• You might build an ALU now without worrying about synchronising, but it has delay, so if you're going to register the output (as any practical CPU application does), you'll have to worry about the effect of its delay at the register for synchronising then. – Neil_UK Oct 17 '16 at 8:59