Based on useful comments of The Photon, Andy aka and PlasmaHH.

As I got, there is indeed the parasitic low-pass. There is no magic bullet that will mitigate it. Large receiver capacitance is to kill the high frequency signal.

So the question, what is the maximum allowable load capacitance for CML (/LVDS) for say 1G, 5G and 10G Hz signals? If based on experience or supported by links - better.

How to design a high speed CML driver given a low-pass filter formed by parasitic load capacitance (several pF) and terminating resistor (50 Ohm)? The problem is that high frequency signals are attenuated by the low-pass.

1. I am designing a high speed (several GHz) CML driver.
2. The transmission line (a microstrip or a coax) must be terminated (either at source or at receiver) with 50 Ohm (assuming single-ended termination).
3. A parasitic capacitance of several pico-Farads is expected (either at the receiver or at the source) (contact pad's parasitic capacitance to ground).
4. The driver drives high frequency AC current. Terminating resistor and load capacitance form an RC low-pass filter.

For my specs (50 Ohm, 5 pF) signals above around 1 GHz are attenuated substantially by the parasitic filter. What can be done?

They say (URL, table 2), that CML may drive signals up to 10 GHz while i am stuck with around 1 GHz given 3 pF load. Do they assume very low (say 500 fF) load capacitance for such high frequencies (10 GHz).

Below is a simplified schematic of the driver in LTSpice (can be downloaded here) that shows how the filter works. Green line correspond to output voltage signal for 1 GHz and red one (attenuated) for 3 GHz input signals.

enter image description here enter image description here

I can mitigate the problem at one end of the line by decreasing Rterm. However, decreasing Rterm at both ends is not an option (improper termination). So, the only option I see is to decrease substantially parasitic capacitance where the transmission line is terminated.

As Andy Aka kindly suggested I added 7.5 nH in series with the TL without noticeable improvement in amplitude or edges.

Below are test setup, simulation in Spectre with 7.5 nH and without it respectively.

Fig1: Setup enter image description here
Fig.2: 7.5 nH enter image description here Fig.3: 0 nH (original setup)

  • \$\begingroup\$ At these frequencies and with ltspcies transmission line I found the results to often be far away from reality. I think some people built more realistic models of transmission lines for ltspice,but afaik the stock version is just not geared towards these things. \$\endgroup\$ – PlasmaHH Oct 17 '16 at 12:47
  • \$\begingroup\$ @PlasmaHH I use mtline (differential) in Spectre and a real foundry library. The problem is still there. LTSpice was used so that ppl can play and see that there is an RC filter indeed. Is it true that this filter presents a fundamental limit for the frequency or not? \$\endgroup\$ – Sergei Gorbikov Oct 17 '16 at 12:50
  • \$\begingroup\$ @PlasmaHH You may remove tline whatsoever as tline properly terminated is just a resistor with delay. \$\endgroup\$ – Sergei Gorbikov Oct 17 '16 at 12:54
  • \$\begingroup\$ yes, there is always some input capacitances around, and this is often a reason why on higher frequencies things not only are short but have lots of distributed element filtering going around. The feasible limit for todays technology is probably bout 100GHz though. \$\endgroup\$ – PlasmaHH Oct 17 '16 at 12:54
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    \$\begingroup\$ probably just inexperienced, 3pF is a lot, 10GHz scope probes usually have like .3pF. At these frequencies, without a lot of experience, lots of things don't seem to be intuitive. \$\endgroup\$ – PlasmaHH Oct 17 '16 at 13:02

I only see a few dB of attenuation @ 3GHz, are you really sure this is a problem?

The line receivers are usually good for a few hundred mV differential, and I am seeing ~600mV there, so it is not like you are that short on level at the output end of the line.

There is a reason line equalisation and preemphasis exists, but I would call 3pF awful high for this sort of thing, fractional pf is more like it.

Note that the usual expectation is a transmission line pretty much right to the load, so where is your 3pf load?

Narrowband you can do stub line or even an L match with lumped components, 2GHz is low enough that 0402 parts still look like lumped elements.

  • \$\begingroup\$ Thanks for a number of useful insights (especially regarding several hundred mV differential). As for 3 pF at the beginning of the TL, it is there. I just didn't show it in the simplified schematic. And it still acts the similar way (RC low-pass). How can these "fractional pf" be achieved in practice? Oscilloscopes have an input load capacitance on the order of 100 pF which is reduced as shown below in my answer (10x compensated probe). So, do you mean that load capacitances are reduced with some "tricks" like these. The point is that in the chip case we use it is said that /ctd \$\endgroup\$ – Sergei Gorbikov Oct 18 '16 at 14:24
  • \$\begingroup\$ /ctd the parasitic capacitance of the case to ground is 3 pF. i can't say the case producer to reduce the parasitic capacitance of the chip case. As for 3dB attenuation, yes in this case it seems to be more or less, but at greater attenuation the comparator at the receiver side may not resolve the transition from low to high frequency (say 200 MHz to 2 GHz), I am afraid. \$\endgroup\$ – Sergei Gorbikov Oct 18 '16 at 14:24
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    \$\begingroup\$ Wait, your capacitance is on the Driver end of the line, and you are using current source drive? This is not what your spice models show. Considering the current sources to be high impedance the source is then basically capacitive, can you not tune this out at high frequency with series inductance at the driving end of the line (Of with a deliberately mismatched line section if this is narrowband). 'Slow old school scopes usually have 30pF || 1M ohm, but you might want to look at what something actually fast looks like, the quick stuff is usually 50 ohm. \$\endgroup\$ – Dan Mills Oct 18 '16 at 14:52
  • \$\begingroup\$ The real setup looks like this. Not sure you can see it. I model parasitic capacitors at both ends and am terminating at both ends with low resistance close to the driver and capacitive divider close to the receiver - with the same aim - to decrease parasitic load capacitors. Though, I need to use a lot of current (as cost). As for inductor at the side of the driver - thanks, I'll try. Now I have only 2 nH parasite but going add a discrete PCB element as you suggest. As for "modern scopes" 50 Ohm - I've read, do you have any idea how they achieve it? ctd/ \$\endgroup\$ – Sergei Gorbikov Oct 18 '16 at 15:09
  • \$\begingroup\$ ctd/ It would be a dream to have a 50 Ohm resistive termination at the receiver side. \$\endgroup\$ – Sergei Gorbikov Oct 18 '16 at 15:10

I'd be tempted to put a 7.5 nH inductor in series with the output of the transmission line before the load and parasitic capacitor. Now, the L and C(parasitic) form a short transmission line of 50 ohms impedance. This should recover some of the edge losses.

Z = \$\sqrt{L/C}\$ = \$\sqrt{7500/3}\$ = 50

  • \$\begingroup\$ Andy, thanks. I tried to add the inductor without any material improvement in amplitude or edges, unfortunately. Pls, see the setup, simulation results with 0 nH and with 7.5 nH in Spectre. Pls, watch the transition between DC and 3GHz at 2ns which is of most interest. Did you or others try this in practice with improvement for high speed? \$\endgroup\$ – Sergei Gorbikov Oct 17 '16 at 14:46
  • \$\begingroup\$ Maybe you should add these pictures to the question as an addendum. I can't view these files it seems. \$\endgroup\$ – Andy aka Oct 17 '16 at 15:07
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    \$\begingroup\$ @Sergei, what is the actual load (datasheet)? Remember that it likely also has some lead and bondwire inductance parasitics. probably not 7 nH, but maybe 2 - 3 nH. If you're going to tune up a termination like this, you'll probably need to account for that, which might require some experimental adjustment. \$\endgroup\$ – The Photon Oct 17 '16 at 15:54
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    \$\begingroup\$ My point is that, like Andy says, that parasitic inductance might help to compensate for the load capacitance. So it may simplify your life to add them to your model now. Otherwise, there's no real magic bullet --- you can't use something like a stub line compensation with digital signals the way you might be able to with a narrow-band rf signal. \$\endgroup\$ – The Photon Oct 17 '16 at 16:11
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    \$\begingroup\$ @SergeiGorbikov, you can start here or google "stub line matching". \$\endgroup\$ – The Photon Oct 17 '16 at 16:45

Adding smaller capacitance in series with parasitic load forms a capacitive divider and reduces the capacitive load.

Signal amplitude is reduced according to the capacitors divider.

Theoretically, if no limitations on current, this way one can mitigate any load parasitic capacitance.

Below are the updated schematic and simulation:

enter image description here

enter image description here

PS: Inspired by compensated scope probe used in oscilloscopes for reducing parasitic capacitance of the scope (e.g. URL1, URL2).

PPS: Incorporation of bonding wire inductors (~2 nH) (not shown in the simulation) into the model does improve HF amplitude.

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    \$\begingroup\$ I can see this working nicely if the receiver chip is sensitive enough for the low frequencies and AC coupling is OK +1 \$\endgroup\$ – Andy aka Oct 18 '16 at 14:40

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