# Supercompilation for electronic design

I'm reading Advanced FPGA Design and the first example, one of simply raising a number to the 3rd power, quickly diverges into various quite clever optimizations to make the valuation faster.

Now, personally, I'd argue that such minutae is best left to the computer, so my question is this: is supercompilation (synthetically combining program elements until an optimal algorithm is found) used when appled to HDL?

TBH, I always assumed that that's exactly what synthesis is: taking HDL code and making sure it runs in optimal time. But the book hints at that not being the case, and altering code to shorten the evaluation path actually makes a difference.

• You have chosen to get an ADVANCED design book. Why are you complaining that the book "diverges" into optimizations? – Ale..chenski Oct 17 '16 at 17:58
• Generally the tools will try to reduce the cycle time (and hence increase maximum clock), but cannot reduce the number of cycles taken for an operation. – pjc50 Oct 18 '16 at 20:06