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Looking at this answer to FPGA's vs Microcontrollers --https://electronics.stackexchange.com/a/4393/127001

It mentions that FPGA is space-limited, and MCU is time-limited. So this got me to thinking.

How big can FPGA get if we assume the system using MCU has the similar application and setup as the FPGA? Would it be safe to assume that system that uses MCU and SoC has the similar answer in this case?

UPDATE: To clarify, let's use Arduino Uno as a reference for MCU. What would be the physical size of FPGA if you were to use the similar specification of Arduino Uno?

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    \$\begingroup\$ What do you mean by "how big"? What does it even mean to compare the "size" of a MCU and an FPGA? (Do you mean the physical size??) \$\endgroup\$
    – user39382
    Oct 17 '16 at 20:47
  • \$\begingroup\$ @duskwuff - if you add more gates in FPGA, you add more functionality, therefore the overall system becomes larger. Let's use Arduino Uno as our reference, the size is about the size of a credit card and about a centimeter thick. If you were to have the same specification, how big would FPGA system be? edit: just saw your last sentence... yes the physical size. \$\endgroup\$
    – Smiley
    Oct 17 '16 at 20:52
  • \$\begingroup\$ Might be more informative to compare the die size (size of the actual silicon chip that's inside the IC package). Arduino Uno is huge because of its PCB, equivalent Arduino Pro Mini is the same thing in smaller form factor. Same ATmega328 microcontroller, smaller PCB. Sometimes datasheet may specify die size (Maxim does), but not every manufacturer publishes die size. Might be possible to estimate die cavity size from the external package size. Some FPGA (Xilinx Zynq) even use stacked-die construction, so it gets really complicated. \$\endgroup\$
    – MarkU
    Oct 17 '16 at 21:08
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    \$\begingroup\$ The problem you are suffering from is you are comparing the size of development boards, not the size of the chip. Like comparing the acceleration of two cars by which has the bigger boot and ignoring the size of the engine. \$\endgroup\$
    – Majenko
    Oct 17 '16 at 22:27
  • \$\begingroup\$ For instance, the DE0 Nano is smaller than the Arduino Mega2560 yet is a million times more powerful. \$\endgroup\$
    – Majenko
    Oct 17 '16 at 22:30
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I think you are a little confused about the fundamental difference between the FPGA, a processor, and a microcontroller.

In simple words:

A processor is a special logical device that can do only a specific functionality, like executing a program instruction by instruction. So, since there is a limit to the speed at which the processor can "jump" from line to the next, we say that it is time limited and can not work faster than its maximum. A microcontroller is like a processor but it has memory and is like a system on a chip.

An FPGA is a "scaffold" of logical components, primitive blocks that can be interconnected into larger blocks to perform a specific function. Therefore, if you have enough "components" to make two or three or more identical blocks that can perform the same function, you can run them in parallel, and thus will get the job done faster (just like using several processors to work in parallel). In fact, you can design your own processor(s) and implement them on an FPGA. But the key idea is that if you do not have enough logical components, your are space limited, or better to say, resource limited. The amount of the logic that can be placed on the IC die is limited due to the limited space (and for other reasons).

So, the bottom line is that you can make a really fast system using FPGA, if you have enough FPGA resources (area on which logic components reside), so the ultimate limit is the "size" - which defines how many adders, multipliers, RAM blocks, etc. are given in a particular FPGA chip. As for the processor, there is no way you can make it run faster than its maximum frequency. So, this is where you have the bottleneck - you can not jump to another function before you finished the previous one, but with an FPGA, those functions can be ran together at the same time.

As for the physical sizes, the chips are made of different sizes depending on the amount of resources that should be inside them, and the number of pins. You can look up different parts and compare the sizes in terms of physical dimensions and resource wise. But, as mentioned in the other answers, you should not mix the chip size with the PCB board size that contains all the necessary components to interface a chip.

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The phrase "space-limited" in the post you're reading is referring to configuration space -- that is, the number of configurable logic blocks in an FPGA. It has nothing to do with the physical size of the part, or of the development board it's mounted on.

MCUs do not (typically) have configurable logic blocks in the same sense as an FPGA, so there's no way to make an apples-to-apples comparison of the "size" of the two parts here.

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The well-known Spartan3 series has chips with 50,000 up to 5,000,000 gates. The old 6502 CPU has about 1,000 gates. A 1,000 bit SRAM has 2,000 gates.

So you can go figure how many processors you can put on an FPGA and what a shameful low amount of RAM (using the gates only). That's the reason why FPGAs also contain dedicated RAM bits and "Block RAM", together roughly the same number as it has gates. It's still nothing in relation to what a SoC offers.

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  • \$\begingroup\$ so what does 5 million gates mean, in terms of size? I'm a beginner, still learning the difference between the two. I'm looking at Arduino Uno which is smaller than the size of a phone, and then FPGA is a lot bigger, but it's unfair to compare this way since the specifications are not the same. \$\endgroup\$
    – Smiley
    Oct 17 '16 at 20:46
  • \$\begingroup\$ The physical size of a gate depends on the minimum feature size of the wafer fabrication process. This length is usually given in units of microns. Smaller feature size is more expensive as it requires upgrading all of the wafer fab equipment. This makes it hard to do a fair apples vs oranges comparison, there are so many variables. \$\endgroup\$
    – MarkU
    Oct 17 '16 at 21:15
  • \$\begingroup\$ The Spartan3 5,000,000 gates chip is 23mm x 23mm in footprint size. The 50,000 gates piece is 8mm x 8mm in footprint size. But this heavily depends on the number of I/O pins a chip offers, and the package. When you look at at the same chip in SSOIC package vs. BGA package, you see the difference. \$\endgroup\$
    – Janka
    Oct 17 '16 at 21:23

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