Obviously, since the hFE of the transistor is 20, you cannot expect a large gain. You wrongly deduced that the gain is R1/((re1+R2)+(R4||(R3+re2)), which you could have formatted in a proper manner. But I am digressing. The gain, in fact, is R1/((re1+R4)+(R2||(R3+re2)). If you take a look at it from the right side of the base, it becomes painfully obvious.
The next point is your comment: ' I just assumed 1GHz to eliminate the capacitive resistances.'. You are an engineer - Think like one. Just 'assuming' and wildly guessing a number because you heard somewhere that high frequencies eliminate 'capacitive resistances' (which are capactive reactances) is no way to model a system. It is clear that you have no idea what is actually going on in the circuit, and little to none understanding of terminology.
Picking 517.3MHz will give you much better results. As for why - I will leave that to you to figure out. This brings us to the final conclusion - Implement the aforementioned changes and you will see a gain of 6.2.
And as a sidenote - Begging for homework answers is not a good way to become an engineer. I suggest you stop now, before you become dependent on others for as simple things as calculating circuit gains.