I'm working with an amplifier chip (slave mode) that is currently receiving the SPI commands through an SPI cable connected to an FPGA board (master mode). I'm looking into making the chip operate on a wireless platform and being independent of the FPGA, and also have power and size/weight limitations so am trying to make the device as small as possible. Essentially what I'm looking for is an MCU that could be used to substitute for the FPGA board and supply the required SPI signals (CS+, SCLK+, MOSI+) to make the chip continously run and put data out through MISO+ (which doesn't need to be processed by the MCU as it would be processed elsewhere) The chip carries out 16 bit ADC, with the min SCLK period being 40.8 ns (24 MHz) depending on the sampling rate. The chip samples MOSI+ on the rising edge of SCLK.
Since I'm relatively new to microelectronics I was wondering what the most efficient way of doing this would be, and what would be the best MCU (or a small low power FPGA?) to carry out this task?
So far the two MCUs that I have been thinking about are:
- CC2650 SimpleLink™ Multistandard Wireless
- nRF52832 Advanced performance Bluetooth5/ANT/2.4GHz proprietary SoC
I was hoping the MCU could be programmed to send the commands down the MOSI+ line, which would include: setting 18 16-bit registers of the chip at power-up, send a 16 bit command to calibrate the chip, and send the convert command to start carrying out the ADC (continue cycling through the channels of the chip as long as it is powered). The wireless capabilities of the MCU would only really be used to turn on/off the slave chip. Since the chip carries out 16 bit ADC, and reads 16 bit commands SCLK is pulsed 16 times when CS is pulled low. MISO+ from the slave chip is sent elsewhere to be sent off-board (to a device that only requires the raw bit stream coming out from MISO+), so the MCU wouldn't have to process it.
Since the chip requires 16-bit words to operate, wouldn't it need at least a 16-bit uC to control it?
Noticed that just cause an uC runs at a certain frequency doesn't mean it can provide SPI signals at that same frequency. For example from what I gathered about the TI CC2650 if it is set as an SPI master, the max SPI bitstream is 12 Mhz even though the MCU itself runs at 48 Mhz. Is there normally a correlation between how the base clock of the MCU relates to what SPI frequencies it can provide?
Thank you in advance,