I have a card with a MC74HC125A used to buffer some SPI lines coming from a CY7C68013A USB controller. There are testpoints in place at the output of the buffers. I would like to tap into and supply "my own" SPI signals from an FPGA on another board. There is a latch to remove the power to the CY7C68013A, but there is no way to cut power to the MC74HC125A except for de-soldering and removing it.

Question: Is it possible to drive the lines connected to the outputs of the MC74HC125A with "my own" signals?

  • \$\begingroup\$ Is the CY7C68013A a SPI master or a SPI slave, and are there other devices on this SPI? \$\endgroup\$ Oct 20, 2016 at 1:06
  • \$\begingroup\$ @ThreePhaseEel: The CY7C68013A is set up as master. No other SPI devices, just one single slave. \$\endgroup\$
    – Arnfinn
    Oct 20, 2016 at 1:10
  • \$\begingroup\$ I presume you're trying to drive the slave from the FPGA correct? \$\endgroup\$ Oct 20, 2016 at 1:13
  • \$\begingroup\$ @ThreePhaseEel: That's right. \$\endgroup\$
    – Arnfinn
    Oct 20, 2016 at 1:50

2 Answers 2


Backdriving is dicey business -- taking the buffer out's a better option

I'd desolder the buffer if I were in your shoes -- it's the only guaranteed safe way to do this. If desoldering the buffer is utterly impractical (such as a HC125 in an underfilled BGA somehow) and backdriving it is your only option, here's the rules you need to follow, courtesy of TI:

  • Backdriving should be used only when the state required at the node point in question can be reached in no other way
  • The maximum permissible power dissipation of a device should not, under any circumstances, be exceeded.
  • Outputs that are at a low-level state, as a result of their logic functions, can be raised to a level of Vo = 3 V for a short period by backdriving. The energy, which as a result of this backdriving is injected into the device (Vo × Iol × tpd), must not exceed 25 mW/s. The current that results in an output should not exceed a value of Iol = 300 mA. The pulse duration must not exceed td = 100 ms. To keep the thermal stress within acceptable limits, the duty cycle of the pulses (duration of the pulse ÷ duration of the period) should be less than 1:10.
  • Outputs that are in a high-level state as a result of their logic functions can be lowered to a level of 0 V for a short time by means of backdriving. One output of a device can be short circuited to ground, in such a case, for maximum td = 100 ms. The product of the output current, the supply voltage, and the pulse duration (Ioh × Vcc × tpd) must not exceed 25 mW/s. If n outputs are simultaneously short circuited to ground, limit the total energy injected into the device under test (Ioh × Vcc × tpd) to 25 mW/s. To keep the thermal stress within reasonable limits, the duty cycle of the short circuit (short-circuit duration ÷ repetition time) should be less than 1:10.
  • All voltages, including peak voltages of overshoots/undershoots, must be within the absolute maximum ratings on data sheets.
  • Simultaneous backdriving of several outputs in parallel (wired OR) with a common current source is not permissible. Since current sharing cannot be predicted, there is danger of overloading the circuit.
  • The chip temperature of the circuit under test must not exceed 125°C.
  • Open-circuit (unterminated) lines should be avoided to prevent faults caused by reflection.
  • \$\begingroup\$ De-soldering it is. Much appreciated! \$\endgroup\$
    – Arnfinn
    Oct 20, 2016 at 1:51

It is OK to backdrive Logic outputs in ATE fixtures but not for high signal integrity.

You can analyze the output impedance looking at the incremental voltage drop at rated current levels for VOL and VOH. This applies to most 74HCxx CMOS.

  • @Vcc = 4.5V which is 5V-10%,
    • Zoh = (4.5-3.84)/6mA = 110 Ω max
    • Zol = 0.33V/6mA = 55 Ω max
  • @Vcc = 6V
    • Zoh = (6-5.34)/7.8mA = 85 Ω max
    • Zol = 0.33/7.8mA = 42 Ω max enter image description here

So whatever you drive this device output will be attenuated by the output impedance of this chip and will dump power into these drivers.

SPI drivers cannot have high signal integrity without careful consideration of all path impedances.


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