In my opinion, the solder will not run into the via as long as there is a reliable soldermask web between them. Is that right?
As I know, PCB manufacturers change gerbers all the time to make the boards more manufacturable on their end. If the soldermask web in the gerber is too small, PCB house will reduce the soldermask clearance(enough soldermask annular ring) in order to make a reliable web. That is why I am concerned about the via pad to toeprint spacing cuz PCB house is not allowed to modify the pad/trace, but the solder mask.
My question: What's the min space between exposed via pad to exposed component pad during reflow?