Crystal PCB Layout Design on Re spin Board

Question

I'm trying to redesign the layout with a 8 MHz crystal(XT1) for atmega328p micro controller. Since this micro controller uses internal oscillator,UART Communication does not work reliably on current design.So I decided to go with external crystal for the production.

Since this board works fine with all the other functionalities except UART,we need to re spin the board with minimal changes.The red represents the top PCB layer and blue is the bottom PCB layer (it's a 2-layer design).Due to the placement constraints on the bottom side of the PCB,I placed the Crystal and its Load capacitance on the Top side whereas the micro-controller sits on the bottom side.

I've been reading through several recommendations specifically for crystals layout design.I am sure that design does not meet most of them(ex.Avoid vias). I am concerned about the functionality of the PCB, especially from EMC problems.There are really no high frequency signals on this board except 8 MHz. Can anybody give some suggestions on how the PCB can be improved?

Answer 1

Things which I would change:

• do not use right angle tracks;
• consider usage of generator instead of oscillator of respective frequency;
• do not put components too close to dimensions (in your case I see a hole);
• put GND plane near and behind the crystal;
• wiring between SMD capacitor pads IMHO may not be a good idea.

Sometime you have to put some extra effort and make things right from the start. I think it is this case.

Answer 2

First, I've to warn you about the clock frequency. I don't know your desired baud rate, but 8MHz is not acceptable for high-speed (e.g. 115200bps) proper UART. Have you checked the datasheet? UBBR n register determines the communication speed with the following formula (p.227): $$ UBBR = \frac{f_{OSC}}{16 \cdot Baud} - 1 $$

UBBR must be an integer between 0-4095, Baud is an integer multiples of, say, 2400. So, it's easy to calculate that oscillator frequency should have a frequency of \$f_{OSC} = k \cdot 1.8432 MHz \$ (k is an integer). Example: For 115.2kBaud, UBBR is calculated 3.34 so selecting UBBR = 3 yields a baud rate of 125kBaud. And the error rate can be calculated as follows: \$e = |1 - (calculated Baud) / (desired Baud)| = |1 - 125k/115.2k|= 8.5\% \$ which is terribly unacceptable. With an 8MHz crystal and assuming maximum allowable \$e = 2\%\$, the maximum allowable baud rate will be 38.4kBaud. So, the slower the baud rate, the lesser the error rate. Consequently, instead of 8MHz, I recommend you to use 7.3728MHz (1.8432 x 4). Also: How critical are UART frequencies?

Anyway, my suggestions about PCB design:

• Use huge GND planes.
• Keep tracks as short as possible.
• Place the components as close as possible.
• Add a GND pad for crystal's outer case. Grounding the case can improve the performance.
• Keep positive and GND tracks/planes as close as possible.

Answer 3

This isn't an answer to your question, but I'd like to raise a point a little too weighty for a train of comments.

I don't know the ATMega family, but I'd encourage you to spend a few moments looking to see if there is a pin-compatible option that has a better internal oscillator. The option may or may not exist, but life gets a bit easier if it does.

Of course, if there is such an option, whether its a viable option or not depends on your situation. If your plan is commercial, then you need to weight the costs of hardware redevelopment against the increased cost of the processor. If you need something fast, where you've already validated the remainder of an existing board, and you're only making a few, it probably works real well.

Answer 4

There are a few things I would worry about here. First, the traces should not be squared. You want to eliminate any corners on this PCB. 45 degrees angle work well. Another thing to consider would be to keep traces away from the oscillator since it can get coupled to other unrelated traces. In this case, those traces are on a different layer, so it looks fine. And keep your oscillator traces as close to each other as possible.