I'm implementing a CAN Bus receiver in VHDL under 250 kbit/s, and a curious frame turned up. This is finishing the field of CRC, the last under the application of bit stuffing. And I have:


I don't know if that final 1-bit is the beginning of the CRC delimitter field or a bit stuffed to will be ignored.

Any ideas?


  • 1
    \$\begingroup\$ After 5 bits of the same polarity, CAN will add a bit stuffing bit of the opposite polarity. However, I don't think it adds bit stuffing from the CRC delimiter and beyond. \$\endgroup\$
    – Lundin
    Oct 21, 2016 at 7:06

1 Answer 1


Finally, I found the answser!

The final bit is a bit stuffed, because the previous five zeros are inside of CRC field. The next bit to final 1 is the CRC delimitter bit, and next the ACK slot bit.

Now the ACK is sent in its correct place and no error is present in bus.


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