If you plan on working with programmable logic (e.g. FPGAs, not MCUs), VHDL and Verilog are the two languages you'll have to know. As a student, you'll probably have to learn both, use both and be examined in both. That was certainly the case for me (and I only took a few courses in ASIC design), though it was a long time ago.
Chances are either VHDL or Verilog will be preferable to you. I have a personal preference for Verilog, but knowing both helps.
As a future engineer, you can roughly double the chances of getting a good job in designing with FPGAs (and similar technologies) if you can use both Verilog and VHDL.
You should try to make the choice as irrelevant (to you) as you can, personal preferences aside. A language is just a means of attaining a goal, not an end in itself. Consider yourself lucky there are only two big HDLs out there. If you were a computer scientist, you'd have to learn a good dozen entirely different families of programming languages, and be able to learn a new one in hours, and understand its idiom in days.
Aside: programming languages (used to control the operation of Turing Machines) and hardware description languages (used to control the configuration of hardware) are different things altogether, although most HDLs have structures that either make them look like programming languages, or make them programming languages also. If this is confusing, just accept that you can't write a computer operating system in VHDL, same as you can't describe a RISC CPU in C.