I am creating a homebrew CPU. My current design has a TTL 'AND' gate that takes two inputs. The CLK (running at 1Mhz) and another that determines if the CLK should propagate onwards to update a register.
This all seems reasonable but I would like to remove the TTL chip from the design as I only need it for this one 'AND' gate. I found that two diodes can be used to create an AND gate in the following way...
Is this a safe thing to do with a 1Mhz CLK input? Will it provide as reliable an output as a traditional TTL 'AND' gate?
The CPU is made up of 74HC series TTL chips. With 5v being a logical 1 and 0v being a logic 0. With a clock speed of 1Mhz and. Input 'A' is the clock line and input 'B' is a control line coming from the instruction decode logic. It will have been stable for several 100ns before the next clock tick.