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I recently took an oscilloscope to a reset circuit on a new board I am working on (derivative of WildFire). Nothing earth shattering here, U6 is an Atmel ATMega1284P (VCC=5V), and U8 is an FTDI FT231X (VCCIO=3.3V, 5V-tolerant). The relevant parts of the schematic are:

enter image description here

and

enter image description here

and here is a scope trace of what happens when DTR goes low on the FTDI chip.

enter image description here

The blue line is DTR, the yellow line is RESET (never mind the labels). When DTR goes low, it looks to me from the scope, that the RESET signal doesn't get all the way to GND, reaching a minimum at the cusp of about 1.72V before 'discharging' back to 5V.

The thing is, the ATMega1284P is certainly resetting as intended, but I'm concerned that it's not reaching a low enough voltage to be in spec for a reset. The datasheet says that Vlow for RESET is 0.1*Vcc, which would be 0.5V @ Vcc=5V, and I'm a good 1V above that apparently.

So, (1) can you explain why RESET doesn't get all the way to GND, and (2) can you suggest a fix, without changing the design fundamentally, that will get RESET to drop below 0.5V when DTR transitions from 3.3V to GND? I'm imagining the shape of this fix to be something like change R11 to a different value, or change C24 to a different value. Or some combination theretofore.

Or am I just seeing a measurement artifact? You can't really see it behind the cursor bubble on the scope trace, but when DTR transitions from GND to 3.3V, it looks like RESET exhibits an inverse signal, rising to about 6.48V and then 'discharging' to 5V. I'm not seeing how that is a predicted outcome of the circuits in play here.

EDIT Writing a question down thoughtfully makes it stare you in the face sometimes. It's because DTR is at 3.3V and RESET is at 5V. So the most that C24 can pull down reset is by 3.3V, which leaves a residue of 1.7V.

So the updated question is how would you fix this? Pull the ATmega1284P reset up to 3.3V instead of 5V?

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  • \$\begingroup\$ How would the two signal traces be different if the pins are connected directly? That indicates there is some extra circuitry that you left out. What sits between RESET/2.3E and RESET/7.7B? \$\endgroup\$ Oct 26, 2016 at 21:10
  • \$\begingroup\$ @BrendanSimpson Nothing those nets are identical, they are just on different pages of my schematic. DTR and RESET are coupled through C24 (in series). \$\endgroup\$
    – vicatcu
    Oct 26, 2016 at 21:15
  • \$\begingroup\$ Is your yellow scope channel AC coupled? \$\endgroup\$ Oct 26, 2016 at 21:20
  • \$\begingroup\$ Read the Atmega datasheet carefully, looking for logic levels applying to the Reset pin, at VCC=5V. It'll likely confirm that 3.3V is unambiguously Logic 1 in which case your EDIT idea is fine. \$\endgroup\$
    – user16324
    Oct 26, 2016 at 21:22
  • \$\begingroup\$ @BrendanSimpson nah it's DC coupled. \$\endgroup\$
    – vicatcu
    Oct 26, 2016 at 21:24

1 Answer 1

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I recall having exactly the same issue on a recent design with the FT231X. I'll have to check tomorrow on our original issue and solution but I reckon the answer is to reprogram the ftdi chip to invert the DTR function (maybe, or maybe you need to use a different pin) and use it to drive an open drain FET on the reset net.

EDIT: Sorry, I have completley mis-remembered our issue. It was with using CBUS3 as a power enable on a FT230X (not full handshaking version). Still, if you can invert your signal the suggestion should work.

I have to say I'm a little confused though, the DTR functionality is for RS232 handshaking and I can't see on the datasheet how you can use this for reset?

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  • \$\begingroup\$ It's an old Arduino trick. The capacitor circuit is just meant to convert a falling edge on DTR (which I suppose is built into USB driver) into a brief low blip on the RESET line. \$\endgroup\$
    – vicatcu
    Oct 27, 2016 at 13:30
  • \$\begingroup\$ That is to say, when you open a terminal program on a computer, it induces a reset. \$\endgroup\$
    – vicatcu
    Oct 27, 2016 at 13:45
  • \$\begingroup\$ @vicatcu Right, trick you say, sounds like a bodge to me ;) \$\endgroup\$
    – SpaceCadet
    Oct 27, 2016 at 13:49
  • \$\begingroup\$ Alas, it's used prolifically in that world. \$\endgroup\$
    – vicatcu
    Oct 27, 2016 at 14:35
  • \$\begingroup\$ It does look like you can configure DTR to invert, so that's probably my most straightforward fix. Invert and add an open drain FET with a pull-up to 5V into the design. \$\endgroup\$
    – vicatcu
    Oct 27, 2016 at 16:21

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