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I have 2 2-bit inputs (eventually need to design for k-bit, but let's start here) and there are 2 2-bit outputs that output the max on one side and min on the other.

What I have so far...

{Image attached if helpful}...

Ignore the subscripts on MX and MN....assume MX1 MX0 and MN1 MN0 for Max and Min bits

...given the two inputs, I have one output that is 1 if X is Max or 0 if X is Min, and another output that is 1 if Y is Max, or 0 is Y is min.

Conceptually, I'm thinking to use these as inputs for a multiplexer, where one takes in both those inputs and uses them against the X and Y bits to determine which ones it's outputting to MAX, and another for MIN. Then I remembered that a Multiplexer gives out one bit.

I thought maybe another circuit we learned, a decoder, might be helpful, but I can't quite see that working either. Having explained my approach so far, can somebody guide me to the next steps? My teacher is very unresponsive, and threads relating to this problem have not been helpful, hopefully somebody can help me specifically with what I have so far!

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  • \$\begingroup\$ I'm not reading you very well. Do you want to take two k-bit inputs and compare them so that you always output the max value of the two on one k-bit bus and the min value of the two on the other k-bit bus? Or do you have some hidden max and min values somewhere you are comparing to? Or what? I'm not fully getting where you are headed. \$\endgroup\$ – jonk Oct 27 '16 at 0:51
  • \$\begingroup\$ Could you please add a truth table to your question? \$\endgroup\$ – Daniel Oct 27 '16 at 0:55
  • \$\begingroup\$ The truth table would be pretty large. I'm sorry if I was scattered and unclear. Let me try again. output1 is the bits of the larger input, output2 is the bits of the smaller input. So if you give it two inputs, one output represents the Max of the two, the other output represents the Min of the two. each input is k-bits, so each output is k-bits. \$\endgroup\$ – Natalie Spatharakis Oct 27 '16 at 1:11
  • \$\begingroup\$ What I ended up doing, I can show in a picture -- I'm not quite sure if it's correct, but I think it is. I made 1 MUX that takes C1 and C2, which represent Cx = 1 if INPUTx is the larger one. And it determines there which bits, from X or Y, go into the MAX output. Then another for the MIN output, but "not"ing the Cs so it's for minimum. Does that....make sense? \$\endgroup\$ – Natalie Spatharakis Oct 27 '16 at 1:13
  • \$\begingroup\$ A 4-input binary truth table should only ever be capable of 16 states. \$\endgroup\$ – Daniel Oct 27 '16 at 1:51
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I don't completely understand but you can implement any 4 input function in a 16 to 1 multiplexer. Say for example you use a 74150 with select inputs A,B,C,D. You could put A=X0, B=X1, C=Y0, and D=Y1. Then you just pull up or ground the corresponding inputs. So for example if you input DCBA=1001, so Y>X output 9 would be 1 for CO. A second chip would do C1. When you connect the multiplexer like this you are actually building a 16x1 ROM. That should help you with your bigger input vectors. I'm wondering what you are going to do when X=Y? Except for what happens when the inputs are equal, it looks like C1 is the inverse of C0. That would save you the second multiplexer.

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  • \$\begingroup\$ The logical thing (to me) would be for when X=Y, both outputs would have that value. Because if (say) 3=3, then 3 is the lowest value and 3 is the highest value. \$\endgroup\$ – Ian Bland Oct 27 '16 at 1:22
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Here is my extremely silly answer to this question. It involves exploiting a "priority encoder"

schematic

simulate this circuit – Schematic created using CircuitLab

And it takes advantage of symmetry of binary numbers using an inversion.

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