0
\$\begingroup\$

I find that both NAND FLASH and flip-flops are made up of NAND gates. The only difference between them is NAND FLASH uses floating gate transistors to store charge.

Your Flash drive is actually made up of NAND FLASH and cache memory which has speed equivalent to CPU is made up of flip-flops.

My question is if both operates at 5V and both are made up of basic cell unit NAND gates then what makes flip-flops so faster than Nand-flash? Or What makes Nand-flash slower than flip-flops (probably due to floating gate transistors?) ?

In other words what makes cache memory so faster than a flash drive? The drift velocity of charge in both the architecture must be same as 5V is used for them.

\$\endgroup\$
3
\$\begingroup\$

First: Be careful not mixing up NAND gates (which are logical circuits) and the gate contact of a MOS transistor. These are two completely different things.

The idea having NAND gates makes the internal circuit identical is wrong. Flipflops inside a chip are usually not made from gates but simplified to save space. See e.g. an SRAM cell made from CMOS pass transistor logic.

But indeed, the reason why writing to Flash memory is substantially slower is because of the large amount of charge which has to be put through an isolator (SiO2, so the drift velocity is much lower) onto the floating gate. That takes time, while the transistors which have a normal gate contact can have that one fully charged and de-charged within picoseconds.

\$\endgroup\$
  • \$\begingroup\$ In my question I meant Nand gate as Nand logic gates. But I agree some people assume gate as floating gate transistor. Flip-flops are made up of Nand logic gates though. \$\endgroup\$ – user119778 Oct 28 '16 at 7:08
  • \$\begingroup\$ Flipflops can be made of NAND logic gates. In education, you do. I reality, you do not. That's because logic gates are building blocks which allow people to disregard all the analogue circuitry inside and pretend it's a piece handling 0 and 1 instead of voltages and currents. As soon you design a chip, you can't pretend this any more because your chip would fall short of what competition can do, that's why you find simpler solutions accounting voltages and currents. See the CMOS pass transistor SRAM cell ("flipflop") I have linked above. \$\endgroup\$ – Janka Oct 28 '16 at 8:31
1
\$\begingroup\$

I find that both NAND FLASH and flip-flops are made up of NAND gates. The only difference between them is NAND FLASH uses floating gate transistors to store charge.

Your findings are completely incorrect.

Flash memory is not made up of flip-flops. The internal structure of flash memory is more akin to DRAM than SRAM; the terms "NAND flash" and "NOR flash" refer to two specific ways of structuring the floating-gate transistors. (NAND flash places the transistors in series, vaguely like a NAND gate; NOR flash places them in parallel.)

Reading from flash memory is a slower process than SRAM for many of the same reasons that DRAM is slower than SRAM: detecting and amplifying the signal from a floating gate, and performing error correction, is a slow process. Writing is even slower, as it requires the flash memory to produce a high programming voltage (10-20V in some parts) from a charge pump.

\$\endgroup\$
  • \$\begingroup\$ I didn't say flash memory is made up of flip-flops. I said cache memory is made up of flip flops and flip-flops are made up of NAND gates with a clock. \$\endgroup\$ – user119778 Oct 27 '16 at 17:15
0
\$\begingroup\$

I would say that the internal topology/structure of a NAND Flash chip is much more complicated than a mere flip-flop. A flip-flop is just two or four gates. The NAND Flash contents are manipulated a row (AKA a page) at a time, and the row/page is 1 or 4 kilobits long, read/written by serial transfer, and the data need to get latched somewhere, for you to retrieve the data through a parallel bus... plus the address decoders also take some (minimal) time to do their thing, and if you really mean a whole SSD, rather than a bare NAND Flash chip, then you also have some MCU processing in the data path (Von Neumann style code execution to manipulate and crunch the data).

In other words, even the bare NAND Flash chips do contain quite a complex structure of logic gates, quite a number of gate delays in series for the signals to pass through. And, modern NAND Flash chips are manufactured in modern "lithography" (20 nm and below) - so the individual gates inside are actually much faster than any low-integration 74xyz00 logic family in a stand-alone package.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy