I'm experimenting with FPGA
(I'm using the Mojo board but I don't think is essential), and I wrote some code to add a counter each time a button is pressed (the counter is assigned to the 8 leds in the board)
The code is below (button_conditioner
is simply a debouncer and shouldn't matter, BTW the code of this project is here)
module mojo_top(
// 50MHz clock input
input clk,
// Input from reset button (active low)
input rst_n,
// cclk input from AVR, high when AVR is ready
input cclk,
// Outputs to the 8 onboard LEDs
output[7:0]led,
// AVR SPI connections
output spi_miso,
input spi_ss,
input spi_mosi,
input spi_sck,
// AVR ADC channel select
output [3:0] spi_channel,
// Serial connections
input avr_tx, // AVR Tx => FPGA Rx
output avr_rx, // AVR Rx => FPGA Tx
input avr_rx_busy, // AVR Rx buffer full
input button
);
wire rst = ~rst_n; // make reset active high
// these signals should be high-z when not used
assign spi_miso = 1'bz;
assign avr_rx = 1'bz;
assign spi_channel = 4'bzzzz;
wire btn_out;
reg [7:0] led_r;
assign led = led_r;
button_conditioner btn(
.clk(clk),
.btn(button),
.out(btn_out)
);
always @(posedge rst or posedge btn_out) begin
if (rst)
led_r <= 0;
else if (btn_out == 1'b0) // <=== THIS IS THE WTF LINE
led_r <= led_r + 1;
end
What puzzles me is that the counter is increased only checking for the
signal equal to zero but the condition is on posedge
i.e. a transition
from 0 to 1: so I would expect a check with 1'b1
, what I'm missing?