2
\$\begingroup\$

I'm trying to wrap my head around the concept of separating control grounds and power grounds for a switch mode power supply. I'm trying to use this TI chip in a design for regulating 3.3V, and I've kinda got stuck on the PCB layout recommendation (page 20 of the manual). I'm confused regarding how I should ground everything.

So I've got a couple questions:

  • Why must there exist a control ground and power ground? How are they different?
  • Since these grounds eventually have to be tied together, where should they be tied together?
  • How are ground loops relevant to this? It seems like when I try to understand ground loops, all the examples point to interfacing devices that contain different paths to ground (e.g. a receiving and transmitter connected via a 400 meter cable are grounded in two separate buildings). Relative to a long distance scenario, it seems like I'm only dealing with a single path to ground.
\$\endgroup\$
2
  • \$\begingroup\$ There are plenty of questions about this on stack exchange - try doing a search. \$\endgroup\$
    – Andy aka
    Oct 30, 2016 at 21:03
  • \$\begingroup\$ @Andyaka Hi Andy, I always do a quick search for relevant questions. I was unable to find any with the context of PCBs. \$\endgroup\$
    – Izzo
    Oct 30, 2016 at 21:09

3 Answers 3

3
\$\begingroup\$

Here is a similar question I answered here: How do I design correctly ground plane separation for Texas Instruments TPS63060 IC? and another here: Proper way of connecting logic GND / power GND on MOSFET driver

I think the core concept here that is under discussion is the concept of "ground". As illustrated in the other answers, GND is not always 0V everywhere. Ohm's Law tells us that V=IR, and given a finite resistance of a copper ground plane, as I goes up, so will V. Let's take it to extremes for example:

https://i.stack.imgur.com/mTV13.png

Ignoring the illustration for AC effects, imagine that red arrow is return current flowing. Picture it being 100mA, and then being 100A. Given say a 10mOhm ground plane (huge, but again, for illustration), 100mA of current flowing will cause a drop of 0.001V, while 100A flowing will cause a drop of nearly 1V.

Now, looking at the block diagram for your regulator:

enter image description here

Think about what 'GND' is used for in the circuit. In order for the chip to figure out what voltage to output, it needs FB (feed-back). That gets fed into the error amplifier, which in turn perturbs the control logic (perhaps a SR latch or similar) and modifies the duty-cycle to ensure the output voltage remains in regulation. Likewise, the EN signal controls the part turning on and off -- that needs to be referenced to something.

Consider what would happen if the controller was switching 10s of amperes, and your FB resistor GND was connected immediately to GND near the SW pin. The piece of copper near the high currents, while labeled 'GND', may not actually be the same potential as the 'GND' the controller is using to reference the error amplifier too. Consider what might happen if the FB voltage is thought to be 10mV higher/lower than what it really is -- that translates into an error in output voltage.

In general, you tie them together right at the controller itself. Then, for the small-signal components (i.e. FB resistors, compensation networks), their GND connection should be a trace that routes directly back to the small-signal GND pin of the controller -- no other connections to GND. If you think about where the current flows (and remember, the small-signal stuff is uA of current), it will follow the path back to where you have chosen to connect it to GND.

\$\endgroup\$
3
  • \$\begingroup\$ So there's one thing that confuses me about your explanation. Would it not be better to completely isolate the two GNDs until they go back to the main power supply? It seems like if I had a separate trace for control GND, and then a separate trace for power GND, the high current going into power GND would not change the GND reference for the control logic. It seems like by tying them together under the IC, the high current power GND could 'pull up' the voltage reference used by the control inputs. \$\endgroup\$
    – Izzo
    Oct 31, 2016 at 15:06
  • \$\begingroup\$ To maybe make my question more clear, you ask "Consider what would happen if the controller was switching 10s of amperes, and your FB resistor GND was connected immediately to GND near the SW pin?" and then you say "In general, you tie them together right at the controller itself." Do these not contradict each other? \$\endgroup\$
    – Izzo
    Oct 31, 2016 at 15:12
  • 1
    \$\begingroup\$ Sorry for the delay. What I mean to say is, for this very specific sub-circuit, a switching regulator, they have separated their GNDs to optimize for the scenario I described. What they want to communicate (I believe) is that small signals should not go to the "power" GND plane, but should have their own traces going back to the control IC's signal GND pin. At that pin, you tie it to the system GND. Generally, the scenario you describe where "would it not be better to go back to the main supply" is a board level consideration I would think of, not for a sub-system like this regulator. \$\endgroup\$ Nov 5, 2016 at 1:57
1
\$\begingroup\$

Common impedance coupling is not your friend!

The circuit below depicts what's going on:

schematic

simulate this circuit – Schematic created using CircuitLab

If you connect the control and power grounds at any other point than under the IC (i.e. at the IC's ground pad/pin), the resistance of the common ground trace/area generates a voltage drop due to the high currents flowing through it. This voltage drop, in turn, throws off the regulation because it offsets the voltage divider for the reference input by that much. Furthermore, the same mechanism works at AC to couple switching noise into the control circuits -- this, in general, is called "common impedance coupling", and is a common cause for design-induced gremlins and EMI problems.

\$\endgroup\$
0
\$\begingroup\$

I think you should take a look at the TPS61020 evaluation board documentation:

enter image description here

The connection point seems to be right in the middle of the IC under the bottom pad. If you spread out your output capacitors and inductances you might get "ground bounce" if that is what you refer to by "ground loops"? Just keep the components tight together and with sufficient trace width.

\$\endgroup\$
2
  • \$\begingroup\$ That's what I don't understand. Isn't the entire point meant to decouple power ground and control ground? Why would the connection be made directly under the IC? It seems like any high current ground path should have its own dedicated return path to some master reference point. \$\endgroup\$
    – Izzo
    Oct 30, 2016 at 21:19
  • 1
    \$\begingroup\$ electronics.stackexchange.com/questions/128637/… \$\endgroup\$
    – user16222
    Oct 31, 2016 at 1:01

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.