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I'm trying to implement an analog debouncing filter which uses a 555 timer and a D-flop. Here is the recommended circuit.

But when I simulate this in LTspice as below, the output is 1V constant:

enter image description here (please left-click to enlarge)

Above red V2 represents the 555 timer clock, green V1 represents the noisy input signal; and blue Vout represents the output.

Why is the debounced output not the same as in the page I follow? How can I correct it?

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  • \$\begingroup\$ Your input is only getting to about 1V minimum. This may be above \$ V_{IL} \$ of the flip flop. But based on the 1V constant output I think something is not grounded properly (FF output should be either VCC or GND) \$\endgroup\$ – jbord39 Oct 31 '16 at 1:38
  • \$\begingroup\$ Is the D flop a model of a particular technology; LS, HC, or HCT; or is it just a generic model of LTspice's on making? \$\endgroup\$ – owg60 Oct 31 '16 at 2:18
  • \$\begingroup\$ There's no need to ground unused pins for A-devices, they are internally connected to the 8th pin, which is ground. You can see this if you view the netlist. Also, R1 is completely useless because voltage sources have (machine) zero internal resistance. For your circuit to work, add a DC voltage source in series with V1, that has -1V. Be sure to connect it such that you subtract it from the original signal, not add it. \$\endgroup\$ – a concerned citizen Oct 31 '16 at 6:39
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For help with LTspice DFLOP, see this shackexchange topic. Likely some logic thresholds are not set properly. The default voltage levels for logic elements are 1V, and your input never goes below 1V; thus the output is always High.

However, the bigger problem is with the "recommended" circuit. If the input has an accidental glitch and the bouncing garbage coincides with latching edge of 555 clock, the circuit output might produce a solid signal for the full clock duration. Normally all debouncing circuits work on integration principle, not just by bare sampling by flip-flop.

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  • \$\begingroup\$ can you give me some hints or reference about what you mean by "integration principle"? i cannot find tutorials in net about analog debouncing techniques. \$\endgroup\$ – user16307 Oct 31 '16 at 2:26
  • \$\begingroup\$ The simplest would be a lowpass RC that would reduce the input to some wavy signal that is not delayed too much, while preserving the trigger points for the FF ahead. \$\endgroup\$ – a concerned citizen Oct 31 '16 at 6:40
  • \$\begingroup\$ @aconcernedcitizen do u mean rc filter before the input? what is that for? High freq elimination? \$\endgroup\$ – user16307 Oct 31 '16 at 9:04
  • \$\begingroup\$ @user16307 Yes, between V1 and D input. For example, in your case, a 10k and a 100n~180n would make your pulses smoothed out of noise (to some degree), while leaving a signal that still can trigger whatever trigger is up ahead. \$\endgroup\$ – a concerned citizen Oct 31 '16 at 9:31

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