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I have a board design using a Atmel AT90USB1286 (VQFN64) and I placed vias on the back of the chip for routing purposes. Upon inspection, I found that the AT90USB1286 Chip has a thermal pad on the back of the chip and the vias were getting shorted to them.

Is there a way to prevent the shorting of the vias and still be able to utilize the area on the back of the chip for routing?

My board design

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  • \$\begingroup\$ I can't find anything about a thermal pad for this IC. Is it anywhere in the datasheet? If it actually does have a thermal pad then you will more then likely need to connect it to your power plane, which I am guessing you aren't using either. \$\endgroup\$
    – Kellenjb
    Commented Feb 16, 2012 at 2:04
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    \$\begingroup\$ @Kellenjb - Do you mean ground plane? \$\endgroup\$ Commented Feb 16, 2012 at 3:06
  • \$\begingroup\$ @Aaron doesn't have to be the ground plane, it is up to the ic designer to decide what they want it connected to. I have seen the term power plane used to refer more generally to any of the planes that are used for powering the board, whether it be gnd, 5v, 3.3v, -5v, etc. But with out being able to find it in the datasheet there is no way to know what the ic designer wants. Looks like Leon found it in the datasheet though. \$\endgroup\$
    – Kellenjb
    Commented Feb 16, 2012 at 12:18

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Typically thermal pads on chips need a connection to copper to dissipate the heat. Normally these thermal pads have recommended shapes and can often be larger than the IC itself. The IC's footprint probably needs changing.

To salvage the prototypes, a hack would be to cover the vias before placing the IC.

You could fix the design by covering the vias with your solder mask. Blind and buried vias could be used between internal and non SMT layers, but these are expensive. In both cases moving the vias outside the underside of the IC is probably best from both thermally and electrically.

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You shouldn't be putting tracks and vias under a QFN device, like that. The pad should be soldered, otherwise the chip could shear off if the board is subjected to mechanical shock. With many devices, it should be grounded.

From the data sheet:

"The large center pad underneath the MLF packages is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board."

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If your fab house can do blind vias, that is an option, but not one I recommend.

If it is a thermal pad as you believe, it is probably ground and should be connected to a ground plane with a few vias anyway; the data sheet should tell you that.

If it is not thermal and simply a conducting material, you can route beneath the chip but just without vias.

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  • \$\begingroup\$ Blind vias are very little used as they are Damn Expensive. \$\endgroup\$
    – stevenvh
    Commented Feb 16, 2012 at 7:37
  • \$\begingroup\$ ...and are very hard to get right, which is why. ;) \$\endgroup\$ Commented Feb 17, 2012 at 1:20

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