I am a programmer new to electronics. I wanted to get a perspective on wether Programmable logic is feasible in allowing a basic math algorithm to be accelerated.
Wanting to solve a ray-intersection algorithm (few multiplications and subtractions ) over a grid of 800x600 (480000) numbers. [I understand that integers would be ideal, and control logic is frowned upon - these constraints I can work around]
Everything I have researched so far says that I can offload this processing from a processor onto a FPGA could be programmed that would calculate the problem space in a very efficient manner.
I am thinking of using a CPLD - perhaps literally an Altera MAX® 10 - does this provide the right scale device to get this type of problem set complete ?
If I wanted to calculate the problem set 100/sec would that be possible?
(assuming performance is a problem) Can the problem be easily divided amongst different chips - where each chip wrote it's solution to a different region of ram?
Is this sort of project feasible to attach to a lightning bold/ usb3 / sata or pci express slot in a PC ? - what type of investment does it take to create a board that sophisticated (timing-wise)?
Could this be done with DSP chips? (I'm having a hard time understanding where DSPs are no longer useable - I understand there typical use in filters etc ... but how much more applicable can they be ? Can they perform simple integer math operations?)
Could this be done with discreet logic chips? - I was looking at a this EE project http://www.ele.uri.edu/~vijay/ProjectELE447.pdf ... which described all manner of ALU and multiplier chips - could these simply be piped together to express this algorithm efficiently?
How would my needs change if I needed to solve a grid of 4000 x 2000?
Thanks for your time