6
\$\begingroup\$

Yesterday somone helped me out a lot desinging a level shifter from 3.3V -> 5V. (here)

At first I thought I basically understand what he did, but the more I read up the more I think my understanding of transitors is wrong.

So if I understand this correctly you have current flowing from the base -> emitter. If it is enough current it will allow current flowing from the collector -> emitter in a certain proportion (the factor being beta on the fact sheet). At some point the transistor is saturated, meaning that the current from c->e will no longer proportinally increase but has reached it's maximum.

Now I have a few questions I just didn't find too much about.

  1. Does a saturated transistor have resistance on the C->E route?
  2. In this schematic, why is 5V -> R2 -> Output not a working circuit in itself? Are digital inputs not grounded?
  3. Why connect the Output to the collector and not the emitter? (emitter -> emitting something (current/signal)?)

And in terms of Voltage:

  1. If Q1 is saturated and R2 is the only resistor in the cuircit (assuming transisors really dont have resistance) wouln't R2 cause a 5V Voltagedrop, meaning there is no more Voltage (or less if there is stuff happening with the current at the output, I think that would be a voltage divider) at the output?
  2. The same thing with R1: as I understand it current flows from B->E, meaning the circut is 3.3V -> R1 -> GND. Isn't there 0V after R1?
  3. What would the Voltage be at E in this schematic?

schematic

simulate this circuit – Schematic created using CircuitLab

\$\endgroup\$
  • 3
    \$\begingroup\$ +1 for not just using a suggested circuit but trying to really understand it \$\endgroup\$ – PlasmaHH Nov 5 '16 at 13:14
4
\$\begingroup\$

So if I understand this correctly you have current flowing from the base -> emitter. If it is enough current it will allow current flowing from the collector -> emitter in a certain proportion (the factor being beta on the fact sheet). At some point the transistor is saturated, meaning that the current from c->e will no longer proportinally increase but has reached it's maximum.

That reads correct!

Does a saturated transistor have resistance on the C->E route?

yes. That's its "on resistance". It's typically small, but cannot be zero for anything that is not a superconductor! Typical values range from milliohms to Ohms.

In this schematic, why is 5V -> R2 -> Output not a working circuit in itself? Are digital inputs not grounded?

Whether these outputs have "pull down" or "pull up" resistors or are "high-z" (ie. "floating") depends on the output.

However, you're right, when the Collector-Emitter resisitivity is very high (i.e. no base current is flowing), then this circuit will emit a "high" signal. For many microcontroller buses, a "high by default" is right. For others, it isn't.

Why connect the Output to the collector and not the emitter? (emitter -> emitting something (current/signal)?)

The emitter in your circuit is constantly at ground level, and there's nothing to change that. So there'd nothing you'd do when feeding current into the base.

If Q1 is saturated and R2 is the only resistor in the cuircit (assuming transisors really dont have resistance) wouln't R2 cause a 5V Voltagedrop, meaning there is no more Voltage (or less if there is stuff happening with the current at the output, I think that would be a voltage divider) at the output?

Exactly that is the idea: By inducing a base current in Q1, you pull down the output from 5V level. (where it was before; since we assume no significant current \$I_\text{output}\$ flows into the output, the voltage \$U_2\$ over \$R_2\$ is \$U_2 = I_\text{output} \cdot R_2 = 0 \cdot R_2 = 0\$, and thus, output is at 5V when no current flows into Q1's base, and at (nearly) 0V when the transistor saturates.

The same thing with R1: as I understand it current flows from B->E, meaning the circut is 3.3V -> R1 -> GND. Isn't there 0V after R1?

Typically, the voltage you're looking at is the "base-emitter voltage in on state". It's typically a diode's forward voltage – something like 0.7 V or 0.2 V or so, depending on the transistor and the base current – see \$U_\text{BE}\$ in the datasheet.

What would the Voltage be at E in this schematic?

Strange question. Your transistor's emitter is tied to ground – so it's a constant 0V.

\$\endgroup\$
  • \$\begingroup\$ Oh I looked at this the wrong way all the time, you are pulling the output down by applying base current. Thank you soooo much that helped A LOT. \$\endgroup\$ – s_qw23 Nov 5 '16 at 13:03
  • \$\begingroup\$ That's why the answer has two of these stages: the first inverts the signal, and the second inverts it again :) \$\endgroup\$ – Marcus Müller Nov 5 '16 at 13:05
  • \$\begingroup\$ A lot to learn :D Really interesting, is there like a goto website or book to get my electronics basics up to speed? \$\endgroup\$ – s_qw23 Nov 5 '16 at 13:08
  • \$\begingroup\$ If you'd know German, that'd be the Tietze-Schenk, the semiconductor circuitry bible \$\endgroup\$ – Marcus Müller Nov 5 '16 at 13:21
  • \$\begingroup\$ Thx, my german should be sufficent for this :D \$\endgroup\$ – s_qw23 Nov 5 '16 at 13:23
3
\$\begingroup\$
  1. Sort of. It's more like a voltage source of tens or hundreds of mV with some series resistance, both of which vary with base current. A MOSFET behaves more like a pure resistance. You can think of it approximately as a short or very low resistance between C and E.

  2. If you remove the transistor the output will be 5V. When the transistor is off it behaves like that.

  3. The current flows CE in the direction of the emitter arrow. You could connect the collector to 5v and a resistor from emitter to ground, but the voltage would then be 0V for 0V in and about 2.6V for 3.3V in. The reason for that is that the output voltage subtracts from Vbe so the transistor will never saturate at all.

  4. Yes, that's what we want to happen. Note that this circuit inverts, so 3.3V in is 0V out, and 0V in is 5V out.

  5. As above

  6. 0V by definition

\$\endgroup\$
  • 2
    \$\begingroup\$ Ty for helping me out :D really appreciate it \$\endgroup\$ – s_qw23 Nov 5 '16 at 13:10
1
\$\begingroup\$

1) \$Rce[\Omega] = Vce_{(sat)}/Ic\$ , always rated for \$Ic/Ib=10\$ (to 20 to 50 in special types)

  • Thus \$Rb =10*Rc\$ is typical (not = Rc)
  • for CMOS thus high and low often similar Z out for 1 or 0
    \$Z_{ol}=V_{ol}/I_{ol}\$ , for practical impedance of driver = Z
  • but datasheet tables only give output low or hi \$(V_{ol},V_{oh})\$ but the result you can remember is 100Ω to 50Ω to 25Ω from 5V to 3V logic families with a wide tolerance over temp and Vcc. (Historically it was much higher and slower logic (CD3000 family)

2) assumes common ground ( with low inductance short wires.)

3) Collector has V gain , Emitter out does not. TTL and CMOS have push-pull drivers. Thus logic stages are inverters and some are buffered ( =3 stages, non-inv=2 stages)

4) R2 has 0V drop when Q=off, i.e.pull-up= high = logic 1

5) E is common ground.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.